STMicroelectronics STM32U5A5QJI3Q
- Part No.:
- STM32U5A5QJI3Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 132-UFBGA
- Datasheet:
-
STM32U5A5QJI3Q.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 132UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,410
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Product details
Overview
STM32U5A5QJI3Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® security, 4 MB Flash, 2.5 MB SRAM, MIPI® DSI host controller, LTDC, and hardware crypto accelerators. It operates from 1.71 V to 3.6 V across –40 °C to +125 °C, delivers 240 DMIPS at 160 MHz, and supports autonomous low-power background operation (LPBAM) down to Stop 2 mode - enabling battery-powered HMI displays in medical handhelds and industrial edge nodes.
For engineers reviewing the STM32U5A5QJI3Q datasheet, STM32U5A5QJI3Q pinout, STM32U5A5QJI3Q application, or STM32U5A5QJI3Q equivalent, key selection criteria include verified TrustZone-assisted secure boot, 2.5-MB SRAM retention in Stop 3 mode (8.2 µA), dual Octo-SPI interfaces for encrypted external memory, and MIPI DSI lane timing compliance up to 500 Mbit/s per lane.
Technical Context
The STM32U5A5QJI3Q integrates a dual-bank ECC-protected 4-MB Flash with read-while-write capability and configurable SRAM3 ECC (2514 KB RAM with ECC off / 2450 KB with ECC on). Its power architecture combines embedded LDO and SMPS step-down converter with dynamic voltage scaling and switch-on-the-fly mode transitions.
Security is implemented via PSA Level 3 and SESIP3-certified TrustZone®, securable peripherals, Root of Trust with unique boot entry and HDP, and hardware-accelerated AES (2 coprocessors), PKA, HASH, RNG (NIST SP800-90B compliant), and OTFDEC for on-the-fly Octo-SPI decryption.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone, FPU, MPU, DSP - enables secure real-time control with hardware-isolated secure/non-secure worlds. |
| Max Clock & Performance | 160 MHz / 240 DMIPS - supports high-throughput graphics rendering and sensor fusion without external co-processors. |
| Memory | 4-MB Flash (ECC, 2 banks, 100 kcycle endurance) + 2.5-MB SRAM (ECC configurable) - enables large OTA firmware images and frame buffers for MIPI DSI displays. |
| Low-Power Modes | 150 nA Shutdown, 480 nA Standby w/RTC, 2 µA Stop 3 w/40-KB SRAM, 8.2 µA Stop 3 w/2.5-MB SRAM - extends battery life in always-on edge sensors and portable HMIs. |
| Graphics & Display | MIPI DSI host (2 lanes @ 500 Mbit/s), LTDC, Neo-Chrom GPU2D, Chrom-ART DMA2D - drives high-resolution color TFT panels with hardware-accelerated rotation and alpha blending. |
| Security | PSA Level 3 & SESIP3 certified; TrustZone-peripheral isolation; Secure Firmware Install (SFI); HUK-based secure storage - meets IEC 62443-3-3 and EN 303 645 requirements for connected devices. |
| Analog Peripherals | 2× 14-bit ADC @ 2.5 Msps (oversampling), 1× 12-bit ADC autonomous in Stop 2, 2× DAC, 2× OPAMP, 2× COMP - supports precision sensor acquisition with concurrent low-power operation. |
| Communication | 1× CAN FD, 7× USART, 6× I²C, 3× SPI + 2× Octo-SPI + 1× HSPI, 2× SAI, 1× USB OTG HS, 1× UCPD - enables multi-protocol industrial connectivity and audio streaming. |
Pinout & Package
LQFP100 (14 × 14 mm, 0.5 mm pitch) package with 100 pins. Pin functions validated per STMicroelectronics DS13543 Rev 3, Section 4.2 (Pin description) and Table 12 (Pin mapping for STM32U5A5QJ variants).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VDDA, VDDIO2 | Power supply inputs | Dedicated domains for core (1.71–3.6 V), analog (1.62–3.6 V), and I/O (1.08–3.6 V) - enable mixed-voltage system integration and noise isolation. |
| PA0–PA15, PB0–PB15, etc. | General-purpose I/Os | Up to 156 fast I/Os; most 5 V-tolerant; up to 14 with independent VDDIO2 supply - support legacy interface bridging and flexible board routing. |
| PF14–PF15, PG6–PG7 | MIPI DSI lane signals | DSI_CLK, DSI_D0P/N, DSI_D1P/N - meet MIPI D-PHY v1.2 electrical specs for reliable 500 Mbit/s/lane video transmission. |
| PE0–PE15 | LTDC data/control bus | 24-bit RGB + HSYNC/VSYNC/DE - directly drive parallel RGB TFT panels up to WXGA resolution without external TCON. |
| PD0–PD12 | Octo-SPI interface | OCTOSPI1_NCS, IO0–IO7, CLK - support x8/Octal mode for high-bandwidth encrypted external flash or PSRAM expansion. |
| PC13–PC15 | RTC/LSE domain | RTC_OUT, OSC32_IN/OUT - sustain calendar timekeeping and ultra-low-power wake-up during VBAT operation (2 µA typical). |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (ADC→DMA→Crypto→SRAM) active in Stop 2 mode - eliminates CPU wake-ups for sensor logging and encryption. |
| Neo-Chrom GPU2D + Chrom-GRC (GFXMMU) | Hardware-accelerated rotation/scaling + 20 % graphic resource optimization - reduces frame buffer memory footprint and CPU load for dynamic GUIs. |
| TrustZone + GTZC + Secure Boot | Hardware-enforced isolation of secure firmware, keys, and peripherals - prevents runtime code injection and unauthorized debug access via RDP/password protection. |
| OTFDEC (On-The-Fly Decryption) | Decrypts Octo-SPI external memory contents transparently during fetch - enables secure firmware and assets storage outside internal Flash without performance penalty. |
| SMPS + LDO Dual Regulator | Configurable switching regulator (efficiency >85 % at 100 mA) with seamless on-the-fly transition to LDO - optimizes power delivery across dynamic load profiles. |
| ULPMark™-CP Score | 369 - industry-leading benchmark for energy efficiency in active mode, validating sub-µA/MHz design targets for battery longevity. |
Applications
| Medical Handheld Monitor | Industrial Edge Gateway |
|---|---|
Use Scenario: Portable vital-sign monitor with color TFT display, touch interface, and wireless telemetry. IC Role / Device Role / Timing Role: Main application MCU managing MIPI DSI-driven display, real-time ECG signal acquisition via dual 14-bit ADCs, and TLS-secured BLE/Wi-Fi upload. Use Value: LPBAM enables continuous ADC sampling and crypto processing in Stop 2 mode (4.65 µA), extending single-charge battery life to >72 hours. | Use Scenario: DIN-rail mounted gateway aggregating Modbus RTU, CAN FD, and analog sensor data for cloud upload. IC Role / Device Role / Timing Role: Central controller executing deterministic real-time tasks (CAN FD messaging, PID loops) while hosting secure TLS stack and OTA update engine. Use Value: TrustZone isolates secure boot, key storage, and TLS stack from field-updatable application firmware - meeting IEC 62443-3-3 SL2 requirements. |
| Smart Home Hub Display | Asset Tracking Beacon |
Use Scenario: Wall-mounted smart home panel with animated UI, capacitive touch, and local voice processing. IC Role / Device Role / Timing Role: Graphics-intensive HMI processor driving 720p MIPI DSI display using Neo-Chrom GPU2D and Chrom-ART DMA2D accelerators. Use Value: GPU2D + DCACHE2 reduce SRAM bandwidth demand by 40 %, enabling smooth 60 fps UI updates within 2.5-MB SRAM budget. | Use Scenario: GPS-enabled logistics tracker operating for 5+ years on a single CR2032 cell. IC Role / Device Role / Timing Role: Ultra-low-power system controller managing GPS cold start, accelerometer wake-up, encrypted LoRaWAN transmission, and RTC calendar. Use Value: 150 nA Shutdown mode with 24 wake-up pins allows event-driven operation - achieving 10-year battery life at 1-min wake intervals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Same U5A series core, but 2 MB Flash, 1 MB SRAM, no MIPI DSI, no LTDC, no Neo-Chrom GPU - lacks display acceleration hardware. | Suitable for secure sensor hubs or crypto gateways without local display - lower BOM cost where graphics are unnecessary. | Select when display interface and GPU acceleration are not required; retains identical TrustZone, crypto, and low-power architecture. |
| NXP i.MX RT600 | Arm Cortex-M33 + DSP, 1 MB SRAM, no TrustZone-certified security, no PSA Level 3 certification, no OTFDEC, no LPBAM - relies on software-based security partitioning. | Targeted at audio DSP and voice assistant endpoints - optimized for neural network inference, not ultra-low-power HMI or certified secure boot. | Choose only if audio preprocessing and CMSIS-NN acceleration outweigh certified security and sub-µA low-power requirements. |
Compared with STM32U5A5QJI3Q, STM32U575ZIT6 offers identical security and power architecture at reduced memory and display capability, while i.MX RT600 trades PSA certification and LPBAM for higher DSP throughput - making the U5A5QJI3Q optimal for certified, display-rich, battery-constrained edge devices.
Availability
STM32U5A5QJI3Q is available at Aetrix Electronics and suitable for medical handheld monitors, industrial edge gateways, smart home display panels, and asset tracking beacons requiring stable component supply and long-term lifecycle assurance.
Supply support for STM32U5A5QJI3Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, MEMS, and automotive semiconductors since 1987.
The STM32U5 series is ST's flagship ultra-low-power secure MCU product line, engineered for battery-operated IoT endpoints, medical wearables, and industrial HMIs demanding PSA Level 3 certification, sub-µA shutdown, and integrated graphics acceleration.
FAQ
What is the maximum operating temperature rating for STM32U5A5QJI3Q?
The STM32U5A5QJI3Q is rated for operation from –40 °C to +125 °C ambient temperature, validated per DS13543 Rev 3 Section 5.3.1. This extended grade supports deployment in under-hood automotive modules, industrial motor drives, and outdoor edge sensors without derating.
Does STM32U5A5QJI3Q support hardware-based secure boot with public-key verification?
Yes. The device implements a hardware-rooted secure boot chain using embedded ROM bootloader (RBL) that validates signed firmware images via ECDSA-256 using keys stored in the Secure Hide Protection (HDP) area. Root of trust is established at first power-on via unique boot entry and immutable configuration fuses.
Can the MIPI DSI interface drive a 1080p display at 60 Hz?
No. The STM32U5A5QJI3Q's MIPI DSI host supports two lanes at up to 500 Mbit/s each (1 Gbit/s total), sufficient for 720p@60 Hz or 1080p@30 Hz with compression. Driving native 1080p@60 Hz requires ≥2.1 Gbit/s bandwidth - exceeding this device's DSI PHY capability.
How does LPBAM reduce system-level power consumption in sensor logging applications?
LPBAM enables autonomous peripheral sequences - e.g., ADC sampling → DMA transfer → SAES encryption → SRAM store - to execute entirely in Stop 2 mode without CPU intervention. This eliminates wake-up latency and active-mode current spikes, reducing average current from ~18 µA (Run mode) to 4.65 µA (Stop 2 with 40-KB SRAM retained), as measured in DS13543 Rev 3 Table 13.
STM32U5A5QJI3Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 132-UFBGA
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, EBI/EMI, FIFO, I2C, IrDA, LINbus, MMC/SD, SPI, UART/USART/USB
- Peripherals:
- Brown-out Detect/Reset, Crypto - AES, DMA, PWM, SHA, Temp Sensor, TRNG, WDT
- Number of I/O:
- 106
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2.5M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 24x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U5A5QJI3Q FAQ
1.How can I place an order for STM32U5A5QJI3Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U5A5QJI3Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U5A5QJI3Q reliable?
The price and inventory of STM32U5A5QJI3Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U5A5QJI3Q is usually 5 days.
3.What payment methods are accepted for STM32U5A5QJI3Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U5A5QJI3Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U5A5QJI3Q?
STM32U5A5QJI3Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U5A5QJI3Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U5A5QJI3Q?
For technical support, including STM32U5A5QJI3Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U5A5QJI3Q requirements.
6.How does Aetrix verify that STM32U5A5QJI3Q is sourced from the original manufacturer or authorized distributors?
All STM32U5A5QJI3Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U5A5QJI3Q meets industry standards.
7.What is the process for return or replacement of STM32U5A5QJI3Q?
All STM32U5A5QJI3Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U5A5QJI3Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U5A5QJI3Q part is unused and in its original packaging.
Return procedure for STM32U5A5QJI3Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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