STMicroelectronics STM32U5A5QJI6Q
- Part No.:
- STM32U5A5QJI6Q
- Manufacturer:
- STMicroelectronics
- Category:
- Microcontrollers
- Package:
- 132-UFBGA
- Datasheet:
-
STM32U5A5QJI6Q.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 132UFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32U5A5QJI6Q from STMicroelectronics is an ultra-low-power Arm® Cortex®-M33 32-bit microcontroller with TrustZone® and FPU, delivering 240 DMIPS at up to 160 MHz. It integrates 4 MB Flash with ECC, 2.5 MB SRAM (with configurable ECC), LTDC and MIPI® DSI for high-resolution display control, and hardware crypto accelerators including AES, PKA, and HASH. It targets secure, battery-powered HMI applications such as smart thermostats and portable medical displays.
For engineers reviewing the STM32U5A5QJI6Q datasheet, STM32U5A5QJI6Q pinout, STM32U5A5QJI6Q application, or STM32U5A5QJI6Q equivalent, key selection criteria include its 150 nA Shutdown mode, dual Octo-SPI interfaces, Neo-Chrom GPU2D acceleration, PSA Level 3/SESIP3 security certification, and support for autonomous low-power peripheral operation down to Stop 2 mode.
Technical Context
The STM32U5A5QJI6Q implements a dual-bank Flash architecture enabling read-while-write operations and supports on-the-fly decryption of external memories via OTFDEC. Its power architecture combines embedded LDO and SMPS step-down converter with dynamic voltage scaling and FlexPowerControl for fine-grained energy management across seven low-power modes.
TrustZone® enforces hardware-isolated secure/non-secure worlds with GTZC-managed memory and peripheral protection, while the dual-cache system (32 KB ICACHE + 16 KB DCACHE1/2) sustains zero-wait-state execution and GPU-accelerated graphics rendering via Neo-Chrom GPU2D and Chrom-ART DMA2D.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M33 with TrustZone®, FPU, MPU, and DSP extensions - enables secure real-time control with deterministic floating-point math. |
| Max Clock / Performance | 160 MHz / 240 DMIPS - supports complex UI rendering and sensor fusion without external co-processors. |
| Memory | 4 MB Flash (ECC, dual-bank RWW), 2.5 MB SRAM (configurable ECC) - allows robust firmware updates and large framebuffer allocation. |
| Low-Power Modes | 150 nA Shutdown, 480 nA Standby with RTC, 2 µA Stop 3 with 40 KB SRAM - extends battery life in always-on edge devices. |
| Graphics Interface | LTDC + MIPI DSI (2 lanes @ 500 Mbit/s each) + Neo-Chrom GPU2D - drives QXGA (2048×1536) displays with hardware-accelerated rotation/scaling. |
| Security | PSA Level 3 & SESIP3 certified; TrustZone, HUK, SFI, TF-M support, DPA-resistant AES/PKA - meets requirements for IoT device attestation and secure OTA updates. |
| Analog Peripherals | Two 14-bit ADCs (2.5 Msps), 12-bit DAC (2 ch), 2 op-amps, 2 comparators - enables high-fidelity sensor acquisition and analog feedback control. |
| Communication | 1 CAN FD, 7 USART, 6 I²C, 3 SPI + OCTOSPI ×2 + HSPI, USB OTG HS + UCPD - supports multi-protocol industrial connectivity and USB-C PD negotiation. |
Pinout & Package
This device is housed in a WLCSP208 package (5.38 × 5.47 mm), optimized for space-constrained portable HMI designs. The ballout supports full peripheral multiplexing including dual DSI lanes, LTDC data/control signals, and independent VDDIO2 supply for 1.08–3.6 V I/O flexibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Core power supply and ground | Supplies 1.71–3.6 V to digital core; decoupling required per layout guidelines for stable 160 MHz operation. |
| VDDA, VSSA | Analog domain supply and ground | Independent 1.71–3.6 V rail for ADC/DAC/OPAMP - isolation prevents digital noise from degrading analog accuracy. |
| VBAT | Backup domain supply | Enables RTC, 32×32-bit backup registers, and 2 KB backup SRAM during main power loss. |
| PC0–PC15, PD0–PD15, etc. | General-purpose I/Os | Up to 156 fast I/Os; most 5 V-tolerant, 14 with independent VDDIO2 (down to 1.08 V) - supports mixed-voltage interface with sensors and legacy peripherals. |
| DSI_D0P/N, DSI_D1P/N, DSI_CLKN/P | MIPI DSI differential lanes | Two high-speed DSI lanes (up to 500 Mbit/s each) for driving AMOLED/LCD panels with minimal EMI. |
| LTDC_R0–R7, G0–G7, B0–B7, etc. | RGB parallel interface signals | 24-bit RGB + HSYNC/VSYNC/DE for direct connection to TFT panels when DSI is not used. |
| OCTOSPI1_IO0–IO7 | Octo-SPI data/command/address lines | Enables x8 single-ended or x4 differential interface to high-density PSRAM/NOR/FRAM with up to 133 MHz clock. |
| UCPD1_CC1/CC2 | USB Type-C configuration channel | Supports USB PD communication, cable orientation detection, and role swapping without external transceivers. |
Key Features
| Feature | Design Value |
|---|---|
| LPBAM (Low-Power Background Autonomous Mode) | Enables DMA-driven peripheral chains (e.g., ADC → memory → crypto) without CPU wake-up - reduces active time in Stop 2 mode. |
| Neo-Chrom GPU2D | Hardware-accelerated 2D graphics: arbitrary-angle rotation, perspective-correct texture mapping, and alpha blending - cuts CPU load by >70 % in GUI rendering. |
| OTFDEC (On-The-Fly Decryption) | Decrypts Octo-SPI external memory contents in real time using AES-128/256 - enables secure code/data storage outside internal Flash. |
| Chrom-GRC (GFXMMU) | Graphics resource compression engine reducing framebuffer memory footprint by up to 20 % - extends usable SRAM for larger UI assets. |
| Secure Firmware Installation (SFI) | Leverages embedded Root Secure Services (RSS) to validate and install signed firmware images - eliminates need for external secure boot ICs. |
| Dual Octo-SPI Interfaces | Allows simultaneous connection to two external memories (e.g., PSRAM for framebuffer + NOR for firmware) - simplifies memory architecture in display-centric designs. |
Applications
| Smart Thermostat Display | Portable Medical Monitor |
|---|---|
Use Scenario: Battery-powered wall-mounted HVAC controller with capacitive touch UI and real-time temperature visualization. IC Role / Device Role / Timing Role: Main application processor handling touch sensing, environmental sensor fusion, MIPI DSI-driven color LCD, and secure cloud telemetry. Use Value: 195 nA Standby mode preserves 10-year battery life; LPBAM autonomously samples thermistors and updates display buffers without waking CPU. | Use Scenario: Handheld vital sign monitor with OLED display, ECG front-end, and Bluetooth LE telemetry. IC Role / Device Role / Timing Role: Central MCU managing analog signal chain (ADC4 + OPAMP), GPU-accelerated waveform rendering, and PSA-certified secure data export. Use Value: Dual 14-bit ADCs achieve 85 dB SNR for clinical-grade ECG; TrustZone isolates patient data from BLE stack to meet HIPAA-aligned firmware requirements. |
| Industrial HMI Panel | Secure Access Terminal |
Use Scenario: DIN-rail mounted factory interface with resistive touchscreen, CAN FD machine control, and local data logging. IC Role / Device Role / Timing Role: Real-time HMI controller interfacing with PLCs via CAN FD, driving 7-inch TFT via LTDC, and logging events to external PSRAM. Use Value: 2.5 MB SRAM accommodates full GUI framebuffer + event log buffer; Octo-SPI interface enables wear-leveling-aware logging to PSRAM. | Use Scenario: Tamper-resistant physical access terminal with fingerprint sensor, secure element interface, and encrypted credential storage. IC Role / Device Role / Timing Role: Secure root-of-trust controller performing biometric matching, HUK-based encryption, and secure boot with RDP enforcement. Use Value: PSA Level 3 certification validates resistance to side-channel and fault injection attacks; active tampers trigger immediate SRAM wipe and debug lock. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar ultra-low-power secure MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32U575ZIT6 | Same U5A series core, but 2 MB Flash, 1 MB SRAM, no MIPI DSI, only single Octo-SPI - lacks GPU2D and dual-display capability. | Targeted at non-graphic secure IoT nodes (e.g., smart meters), not display-rich HMIs. | Select when display acceleration and external memory bandwidth are unnecessary - lower cost and smaller footprint. |
| NXP i.MX RT685 | Arm Cortex-M33 with DSP/FPU, 1 MB SRAM, no TrustZone-certified crypto accelerators, no integrated DSI/LTDC - relies on external display bridge. | Suitable for audio-centric edge AI (e.g., voice assistant), not certified secure HMI endpoints. | Choose if CMSIS-NN acceleration and audio pre-processing outweigh display/security requirements. |
Compared with STM32U5A5QJI6Q, the STM32U575ZIT6 trades display capability and memory for cost reduction, while the i.MX RT685 offers higher DSP throughput but lacks PSA-certified security and integrated graphics - making the U5A5QJI6Q uniquely suited for certified, battery-powered, high-resolution secure HMIs.
Availability
STM32U5A5QJI6Q is available at Aetrix Electronics and suitable for smart thermostats, portable medical monitors, industrial HMI panels, and secure access terminals requiring stable component supply across extended product lifecycles.
Supply support for STM32U5A5QJI6Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive semiconductors.
The STM32U5 series is ST's flagship ultra-low-power secure MCU line, engineered for battery-operated, safety- and privacy-critical edge devices requiring PSA/SESIP-certified trust anchors and rich human-machine interface capabilities.
FAQ
What is the maximum operating frequency and associated performance metric?
The STM32U5A5QJI6Q operates at up to 160 MHz with an ART Accelerator enabling zero-wait-state execution from Flash. Its performance is quantified at 240 DMIPS (Dhrystone 2.1) and 655 CoreMark®, achieving 4.09 CoreMark®/MHz - validated under full voltage and temperature range (1.71–3.6 V, –40 °C to +125 °C).
Does this MCU support external memory interfaces beyond Octo-SPI?
Yes. In addition to two Octo-SPI controllers, it features a 16-bit HSPI interface (up to 160 MHz), Flexible Static Memory Controller (FSMC) supporting SRAM/PSRAM/NOR/NAND/FRAM, and SDMMC v4.0 interfaces. These enable concurrent use of external PSRAM for framebuffer, NOR for firmware, and SD card for field-updatable assets.
How does TrustZone implementation differ from standard Cortex-M33 deployments?
ST implements TrustZone with a Global TrustZone Controller (GTZC) that extends protection to memories, peripherals, and DMA channels - not just CPU privilege levels. It includes securable GPIOs, firewall-configurable octal-SPI ports, and hardware-enforced life-cycle states (RDP levels), validated to PSA Level 3 and SESIP3 assurance standards - exceeding baseline Arm TrustZone requirements.
What display interfaces are supported, and what resolutions are achievable?
The MCU integrates both MIPI DSI host controller (2 lanes, 500 Mbit/s each) and LCD-TFT controller (LTDC) with 24-bit RGB output. With Neo-Chrom GPU2D and Chrom-ART DMA2D acceleration, it drives QXGA (2048×1536) panels at 60 Hz using DSI, or WXGA (1280×800) via parallel RGB - all while maintaining sub-2 µA Stop 3 current with framebuffer preserved in 40 KB SRAM.
STM32U5A5QJI6Q Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 132-UFBGA
- Series:
- STM32U5
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Core Processor:
- ARM® Cortex®-M33
- Core Size:
- 32-Bit
- Speed:
- 160MHz
- Connectivity:
- CANbus, EBI/EMI, FIFO, I2C, IrDA, LINbus, MMC/SD, SPI, UART/USART/USB
- Peripherals:
- Brown-out Detect/Reset, Crypto - AES, DMA, PWM, SHA, Temp Sensor, TRNG, WDT
- Number of I/O:
- 106
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 2.5M x 8
- Voltage - Supply (Vcc/Vdd):
- 1.71V ~ 3.6V
- Data Converters:
- A/D 18x12/14b SAR; D/A 2x12b
- Oscillator Type:
- External, Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
STM32U5A5QJI6Q FAQ
1.How can I place an order for STM32U5A5QJI6Q through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32U5A5QJI6Q on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32U5A5QJI6Q reliable?
The price and inventory of STM32U5A5QJI6Q are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32U5A5QJI6Q is usually 5 days.
3.What payment methods are accepted for STM32U5A5QJI6Q?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32U5A5QJI6Q transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32U5A5QJI6Q?
STM32U5A5QJI6Q orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32U5A5QJI6Q order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32U5A5QJI6Q?
For technical support, including STM32U5A5QJI6Q datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32U5A5QJI6Q requirements.
6.How does Aetrix verify that STM32U5A5QJI6Q is sourced from the original manufacturer or authorized distributors?
All STM32U5A5QJI6Q products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32U5A5QJI6Q meets industry standards.
7.What is the process for return or replacement of STM32U5A5QJI6Q?
All STM32U5A5QJI6Q units undergo pre-shipment inspection (PSI). If there is an issue with STM32U5A5QJI6Q, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32U5A5QJI6Q part is unused and in its original packaging.
Return procedure for STM32U5A5QJI6Q:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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