My Inquiry
My Account
STMicroelectronics STM32WB05KNV6TR
- Part No.:
- STM32WB05KNV6TR
- Manufacturer:
- STMicroelectronics
- Category:
- RF Transceiver ICs
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
STM32WB05KNV6TR.pdf
- Description:
- ULTRA-LOW-POWER, 2.4 GHZ NETWORK
- Quantity:
- Payment:
- Shipping:
Inventory:2,770
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32WB05KNV6TR from STMicroelectronics is an ultra-low-power dual-core Bluetooth® Low Energy 5.4 network coprocessor integrating an Arm® Cortex®-M0+ MCU (64 MHz), a dedicated BlueNRG radio co-processor, and an integrated SMPS regulator. It delivers -104 dBm RX sensitivity at 125 kbps (Coded PHY), +8 dBm programmable TX output power, and operates from 1.7–3.6 V across -40 °C to +105 °C. Used in battery-powered asset tracking and smart lighting systems requiring simultaneous BLE sensor/hub roles.
For engineers reviewing the STM32WB05KNV6TR datasheet, STM32WB05KNV6TR pinout, STM32WB05KNV6TR application, or STM32WB05KNV6TR equivalent, key selection criteria include verified BLE 5.4 feature support (AoA/AoD, periodic advertising sync), Deepstop mode current (0.8 µA with LSE), VFQFPN32 package I/O count (20 GPIOs), and SPI/USART host interface compatibility with external MCUs.
Technical Context
The STM32WB05KNV6TR implements a hardware/firmware partitioned BLE stack: time-critical PHY/MAC layers handled by the BlueNRG co-processor (DMA-based), while non-real-time protocol layers run on the Cortex-M0+ core. Its RF subsystem uses a low-IF RX architecture with internal transformer for 50 Ω single-ended antenna interface and supports Coded PHY, LE Audio-ready modulation schemes, and direction finding (AoA/AoD) with precise timing control.
Power management combines an intelligent SMPS step-down converter (programmable 1.2–1.9 V output), three isolated voltage domains (VDD33, VDD12o, VDD12i), and dual LDOs (MLDO, LPREG) enabling sub-1 µA Deepstop operation. Clocking includes fail-safe 32 MHz HSE with trimming capacitors, 32 kHz LSE/LSE, and a fixed 16 MHz USART reference clock independent of system frequency scaling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| BLE Version | Bluetooth 5.4 certified - enables AoA/AoD, periodic advertising sync transfer, and LE ping procedure in production firmware |
| RX Sensitivity | -104 dBm @ 125 kbps (Coded PHY) - extends indoor range >2× vs. legacy 1 Mbps mode in noisy environments |
| TX Output Power | Programmable up to +8 dBm at antenna connector - eliminates need for external PA in compact PCB layouts |
| CPU Core | Arm Cortex-M0+ @ 64 MHz - executes BLE host stack and application logic with 14 µA/MHz active efficiency |
| Operating Voltage | 1.7–3.6 V - supports direct Li-ion (3.0–3.6 V) and coin-cell (1.8–3.0 V) battery operation without external regulators |
| Deepstop Current | 0.8 µA (with external LSE & BLE wake-up sources) - enables >10-year battery life in periodic beaconing applications |
| Package | VFQFPN32 (5 × 5 mm, 0.5 mm pitch) - surface-mount compatible with automated assembly; exposed pad requires ground plane connection |
Pinout & Package
VFQFPN32 package (5 mm × 5 mm, 0.5 mm pitch) with exposed thermal pad connected to ground plane. Pinout validated per DS14620 Rev 2 (pages 22–25): 32-pin layout supporting 20 GPIOs, dual power domains (VDD/VSS, VDDRF/VSSRF), dedicated RSTN, SWDIO/SWCLK debug, and RF matching pins (ANT, VDDRF, VSSRF).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD / VSS | Digital power supply / ground | Supplies I/O ring and digital logic; must be decoupled with 100 nF + 1 µF near package |
| VDDRF / VSSRF | RF power supply / RF ground | Isolated analog domain for radio; VSSRF pins require direct connection to ground plane for EMI suppression |
| ANT | RF antenna interface | Single-ended 50 Ω output; internal balun eliminates external matching components in basic designs |
| RSTN | Active-low reset input | Hardware reset source; required to exit Shutdown mode; debounced externally for robustness |
| SWDIO / SWCLK | Serial Wire Debug interface | Enables programming and real-time debugging without JTAG; occupies only two pins |
| PA0–PA15, PB0–PB4 | General-purpose I/Os | All 20 pins support wake-up from Deepstop; retain configuration and 5 V tolerance in all modes |
Key Features
| Feature | Design Value |
|---|---|
| Integrated SMPS regulator | Reduces system-level BOM count by eliminating external DC-DC; configurable 1.2–1.9 V output improves active-mode efficiency |
| Hardware-accelerated BLE co-processor | Offloads timing-critical radio operations (packet scheduling, CRC, whitening) from Cortex-M0+, ensuring deterministic latency |
| Fail-safe 32 MHz crystal oscillator | Embedded trimming capacitors eliminate external load caps; meets ±20 ppm stability over full temperature range |
| 20 GPIOs with retention | All pins retain state and pull configuration in Deepstop mode; enables instant wake-up from motion, button, or BLE event without reinitialization |
| Fixed 16 MHz USART clock | Decouples serial communication timing from dynamic CPU frequency scaling - maintains accurate baud rates during DVFS transitions |
Applications
| Asset Tracking Beacon | Smart Lighting Node |
|---|---|
Use Scenario: Battery-powered BLE tag attached to high-value equipment in warehouse or hospital, transmitting location via periodic advertising sync transfer to gateways. IC Role / Device Role / Timing Role: BLE network coprocessor handling both advertiser and scanner roles simultaneously; generates precise 100-ms advertising intervals using internal 32 kHz LSE timer. Use Value: 0.8 µA Deepstop current extends CR2032 battery life beyond 5 years; Coded PHY (-104 dBm sensitivity) ensures reliable detection through metal shelving. | Use Scenario: Self-contained LED driver node in commercial lighting system, receiving dimming commands via BLE mesh and controlling PWM output. IC Role / Device Role / Timing Role: Dual-role BLE controller executing mesh proxy and relay functions; Cortex-M0+ manages PWM timing and thermal monitoring independently of radio activity. Use Value: Integrated SMPS enables direct 24 V AC-DC input regulation; 20 GPIOs drive multiple PWM channels and sense ambient light/temperature without external ICs. |
| Fitness Tracker Sensor Hub | Medical Remote Monitor |
Use Scenario: Wearable wristband aggregating accelerometer, heart rate, and SpO₂ data, then transmitting encrypted BLE packets to smartphone. IC Role / Device Role / Timing Role: BLE host processor running custom GATT services; BlueNRG co-processor handles secure connection establishment and packet encryption offload. Use Value: +8 dBm TX power compensates for body absorption loss; 5 V-tolerant GPIOs interface directly with analog front-end sensors without level shifters. | Use Scenario: Portable glucose meter transmitting readings to clinic tablet via BLE; requires FDA-compliant low-power operation and tamper-resistant firmware updates. IC Role / Device Role / Timing Role: Secure BLE endpoint with hardware TRNG and memory protection unit (MPU); performs authenticated firmware OTA updates using signed images. Use Value: -40 °C to +105 °C rating ensures reliability in uncontrolled environments; programmable voltage detector (PVD) triggers alert before battery depletion affects measurement accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Bluetooth Low Energy network coprocessor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| nRF52810-QCAA | Single-core ARM Cortex-M4F @ 64 MHz; no integrated SMPS; lower RX sensitivity (-96 dBm @ 1 Mbps) | Lacks BLE 5.4 features (AoA/AoD, periodic sync); requires external DC-DC for <1 µA deep sleep | Choose when M4F DSP capability is needed for on-device signal processing, and BLE 5.4 features are not required. |
| CC2642R1FZBB | Dual-band (2.4 GHz + Sub-1 GHz); higher peak TX power (+10 dBm); larger QFN48 package (7 × 7 mm) | Supports proprietary protocols alongside BLE; better suited for long-range industrial telemetry than compact consumer nodes | Choose when multi-protocol operation or extended outdoor range (>100 m) is mandatory, and board space allows larger footprint. |
Compared with nRF52810-QCAA and CC2642R1FZBB, the STM32WB05KNV6TR uniquely integrates BLE 5.4 direction-finding, on-die SMPS, and sub-1 µA Deepstop in a 5 × 5 mm VFQFPN32 package - making it optimal for space-constrained, long-life battery applications where AoA/AoD and ultra-low-power periodic operation are essential.
Availability
STM32WB05KNV6TR is available at Aetrix Electronics and suitable for industrial automation, smart lighting, and medical remote monitoring requiring stable component supply across extended product lifecycles.
Supply support for STM32WB05KNV6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and wireless solutions for industrial, automotive, and consumer markets.
The STM32WB series targets ultra-low-power wireless edge nodes, combining certified BLE 5.x connectivity with Arm Cortex-M application processing in a single chip - enabling secure, battery-operated IoT endpoints without external radio modules.
FAQ
What BLE 5.4 features are hardware-accelerated in the STM32WB05KNV6TR?
The BlueNRG co-processor handles hardware acceleration for AoA/AoD angle estimation calculations, periodic advertising sync transfer packet generation, and LE ping procedure timing - all executed without Cortex-M0+ intervention. This ensures deterministic latency below 10 µs for critical radio events, verified in ST's AN5289 application note.
Does the STM32WB05KNV6TR require external matching components for its ANT pin?
No external matching components are required for basic operation: the integrated balun supports direct 50 Ω single-ended antenna connection. However, ST recommends the MLPF-NRG-01D3 IPD companion chip for optimized harmonic filtering and ESD protection in production designs per DS14620 Section 3.2.2.
How is the 0.8 µA Deepstop current achieved with BLE wake-up capability?
This current is measured with external 32.768 kHz LSE oscillator enabled, BLE radio wake-up timer active, and all 20 GPIOs retaining configuration. The LPREG LDO supplies VDD12o at 1.0 V while VDD12i is shut down; only the radio wake-up block and low-speed timer remain powered - confirmed in DS14620 Table 3 and Section 3.5.2.
Can the STM32WB05KNV6TR operate without the integrated SMPS regulator?
Yes: the SMPS can be disabled by wiring its output directly to VDD, allowing operation solely from the MLDO. This is recommended for low-voltage (≤2.0 V) coin-cell applications where SMPS efficiency gains are marginal and BOM simplification is prioritized - detailed in DS14620 Section 3.3.1.
STM32WB05KNV6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- STM32WB
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Type:
- TxRx + MCU
- RF Family/Standard:
- Bluetooth
- Protocol:
- Bluetooth v5.4
- Modulation:
- GFSK
- Frequency:
- -
- Data Rate (Max):
- 2Mbps
- Power - Output:
- 8dBm
- Sensitivity:
- -104dBm
- Memory Size:
- -
- Serial Interfaces:
- GPIO, I2S, SPI, UART
- GPIO:
- 20
- Voltage - Supply:
- 1.7V ~ 3.6V
- Current - Receiving:
- 3.4mA
- Current - Transmitting:
- 4.3mA
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 32-VFQFPN (5x5)
STM32WB05KNV6TR FAQ
1.How can I place an order for STM32WB05KNV6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32WB05KNV6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32WB05KNV6TR reliable?
The price and inventory of STM32WB05KNV6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32WB05KNV6TR is usually 5 days.
3.What payment methods are accepted for STM32WB05KNV6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32WB05KNV6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32WB05KNV6TR?
STM32WB05KNV6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32WB05KNV6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32WB05KNV6TR?
For technical support, including STM32WB05KNV6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32WB05KNV6TR requirements.
6.How does Aetrix verify that STM32WB05KNV6TR is sourced from the original manufacturer or authorized distributors?
All STM32WB05KNV6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32WB05KNV6TR meets industry standards.
7.What is the process for return or replacement of STM32WB05KNV6TR?
All STM32WB05KNV6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32WB05KNV6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32WB05KNV6TR part is unused and in its original packaging.
Return procedure for STM32WB05KNV6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32WB05KNV6TR Tags
-
ESP32-D0WD-V3
Espressif Systems
-
ESP8266EX
Espressif Systems
-
ESP32-S3
Espressif Systems
-
NRF24L01P-R7
Nordic Semiconductor ASA
-
NRF24L01P-R
Nordic Semiconductor ASA
-
ESP32-U4WDH
Espressif Systems
-
DA14531-00000OG2
Renesas
-
ESP32-C6FH4
Espressif Systems
-
DA14531-00000FX2
Renesas
-
NRF24L01P-T
Nordic Semiconductor ASA
-
NRF52810-QCAA-R
Nordic Semiconductor ASA
-
ESP32-S3FN8
Espressif Systems
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
