STMicroelectronics STM32WB10CCU5
- Part No.:
- STM32WB10CCU5
- Manufacturer:
- STMicroelectronics
- Category:
- RF Transceiver ICs
- Package:
- 48-UFQFN Exposed Pad
- Datasheet:
-
STM32WB10CCU5.pdf
- Description:
- IC RF TXRX+MCU BLE 48UFQFPN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32WB10CCU5 from STMicroelectronics is a dual-core multiprotocol wireless 32-bit MCU integrating an Arm® Cortex®-M4 with FPU (64 MHz) and a dedicated Cortex®-M0+ for Bluetooth® 5.4 radio processing. It delivers -95.5 dBm RX sensitivity, +4 dBm programmable TX output, and ultra-low-power operation (18 nA shutdown, 700 nA standby + RTC + 48 KB RAM). Used in battery-powered BLE sensor nodes requiring ETSI/FCC/ARIB regulatory compliance and OTA firmware updates.
For engineers reviewing the STM32WB10CCU5 datasheet, STM32WB10CCU5 pinout, STM32WB10CCU5 application, or STM32WB10CCU5 equivalent, key selection criteria include dual-CPU real-time radio coexistence, integrated balun support, PCROP-protected 320 KB flash, 48 KB SRAM with parity, and hardware AES-256/PKA security for secure BLE stack deployment.
Technical Context
The device implements a tightly coupled dual-CPU architecture: the Cortex-M4 handles application logic and signal processing at up to 64 MHz with ART Accelerator enabling zero-wait-state flash execution, while the Cortex-M0+ exclusively manages Bluetooth 5.4 link-layer timing-critical operations-including GATT caching and EATT-via IPCC interprocessor communication. Both cores share memory-mapped peripherals but operate under independent power domains.
RF subsystem features a fully integrated 2.4 GHz transceiver with on-die balun, supporting 1 Mbps BLE PHY, accurate RSSI-based power control, and external PA interface. Clocking includes factory-trimmed 32 MHz HSE (for radio/CPU), 32 kHz LSE (RTC), and dual LSI oscillators (±500 ppm drift tolerance), enabling precise timing across low-power modes without external crystals.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: Arm Cortex-M4 @ 64 MHz (FPU, DSP, ART) + Cortex-M0+ @ 32 MHz (dedicated BLE radio layer) |
| Wireless Protocol | Bluetooth 5.4 compliant; supports LE 1 Mbps, GATT caching, EATT, and OTA updates |
| RF Performance | RX sensitivity: -95.5 dBm @ 1 Mbps BLE; TX output: programmable from -18 to +4 dBm in 1 dB steps |
| Memory | 320 KB flash (sector-protected via PCROP), 48 KB SRAM (36 KB with hardware parity), 1 KB OTP |
| Power Modes | Shutdown: 18 nA; Standby + RTC + 48 KB RAM: 700 nA; Radio Rx: 7.7 mA; Radio Tx @ 0 dBm: 8.6 mA |
| Security | Hardware AES-256, PKA (RSA/ECC/DH), TRNG, 96-bit unique ID, IEEE 64-bit EUI derivation |
| Analog Peripherals | 12-bit ADC @ 2.5 Msps (190 µA/Msps), touch sensing controller (8 channels), temperature sensor, VREFINT |
Pinout & Package
Package: UFQFPN48 (7 × 7 mm, 0.5 mm pitch, exposed thermal pad).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Main power supply | 2.0–3.6 V analog/digital core supply; decoupling required per datasheet layout guidelines |
| VSS | Ground reference | Dedicated analog/digital ground pins; separate routing recommended for noise isolation |
| PA0–PA15, PB0–PB15, PC13–PC15 | General-purpose I/O | Up to 30 fast I/Os; 28 are 5 V-tolerant; support multiple alternate functions (USART, SPI, I2C, timers) |
| RF_P, RF_N | Differential RF interface | Direct connection to integrated balun; requires controlled-impedance 50 Ω trace routing and minimal stub length |
| OSC_IN / OSC_OUT | HSE crystal interface | 32 MHz crystal input for radio/CPU clock; internal trimming capacitors eliminate external load caps |
| LSE_IN / LSE_OUT | RTC crystal interface | 32.768 kHz crystal for low-power RTC operation; supports external or internal LSI sources |
| NRST | Active-low reset | Asynchronous reset input; internal pull-up; compatible with standard push-button or microcontroller reset sequencing |
| SWDIO / SWCLK | Debug interface | Serial Wire Debug (SWD) for Cortex-M4; JTAG also supported; enables full debug and programming access |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU Real-Time Radio Isolation | Separate M0+ core offloads BLE link-layer timing constraints, freeing M4 for application processing without jitter or latency penalties |
| Integrated Balun | Eliminates discrete matching network, reducing BOM count by ≥4 components and PCB area by >15 mm² in typical BLE antenna layouts |
| PCROP Flash Protection | Hardware-enforced read/write protection on flash sectors allows secure storage of BLE stack and cryptographic keys without software vulnerability exposure |
| Ultra-Low-Power Standby Mode | 700 nA consumption with RTC running and 48 KB RAM retained enables multi-year battery life in coin-cell-powered sensors |
| Hardware Security Acceleration | AES-256 and PKA engines execute cryptographic operations in <10% of software-only time, enabling fast secure boot and BLE pairing |
Applications
| Smart Home Sensor Node | Industrial Predictive Maintenance Tag |
|---|---|
Use Scenario: Battery-powered temperature/humidity/motion sensor transmitting encrypted BLE telemetry every 5 minutes to gateway. IC Role / Device Role / Timing Role: Dual-core MCU executes sensor fusion algorithm on M4 while M0+ maintains BLE advertising/connection intervals with sub-10 µs jitter. Use Value: 700 nA standby current extends CR2032 life beyond 5 years; PCROP-secured flash prevents stack tampering during OTA updates. | Use Scenario: Vibration and temperature tag mounted on rotating machinery, logging data locally and streaming alerts via BLE when thresholds exceeded. IC Role / Device Role / Timing Role: M4 runs FFT-based vibration analysis in real time; M0+ handles BLE GATT caching to minimize host interaction and reduce radio-on time. Use Value: Integrated balun and -95.5 dBm sensitivity ensure reliable 10+ meter range in electrically noisy factory environments. |
| Medical Wearable Patch | Asset Tracking Beacon |
Use Scenario: Disposable ECG patch with single-use battery, transmitting raw waveform data via BLE to smartphone app for clinician review. IC Role / Device Role / Timing Role: M4 performs real-time QRS detection and compression; M0+ enforces BLE privacy mode and EATT for secure attribute exchange. Use Value: Hardware AES-256 and TRNG meet HIPAA-compliant data encryption requirements without CPU overhead or latency impact. | Use Scenario: GPS-denied indoor asset tracker using BLE proximity scanning and RSSI-based location estimation in warehouse logistics. IC Role / Device Role / Timing Role: M0+ drives high-duty-cycle BLE scanning with accurate RSSI reporting; M4 processes location algorithms and stores history in protected SRAM. Use Value: Programmable TX power (+4 dBm max) and calibrated RSSI enable ±1.5 m distance accuracy in multi-path indoor settings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core BLE MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Nordic nRF52840 DK | Single-core Arm Cortex-M4F @ 64 MHz; BLE 5.0 only; no dedicated radio CPU; 1 MB flash, 256 KB RAM | Higher memory capacity but lacks hardware-isolated radio processing; requires software BLE stack with higher CPU load | Select when application prioritizes large local storage over deterministic radio timing or ultra-low-power standby. |
| TI CC2642R1F | Arm Cortex-M4F @ 48 MHz + dedicated Sensor Controller Engine; BLE 5.1; 352 KB flash, 80 KB RAM; no integrated balun | Lower RF integration requires external matching network; superior analog sensor interface but weaker BLE 5.4 feature set | Select for mixed-signal sensor hub designs needing autonomous analog acquisition, not BLE 5.4 advanced features like EATT or GATT caching. |
Compared with nRF52840 DK and CC2642R1F, STM32WB10CCU5 uniquely combines BLE 5.4 protocol acceleration via dedicated M0+, integrated balun for BOM reduction, and 700 nA standby with full RAM retention-enabling longer battery life and stricter real-time BLE timing in resource-constrained edge devices.
Availability
STM32WB10CCU5 is available at Aetrix Electronics and suitable for smart home sensor nodes, industrial predictive maintenance tags, medical wearable patches, and asset tracking beacons requiring stable component supply and long-term lifecycle support.
Supply support for STM32WB10CCU5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog products for industrial, automotive, and consumer markets.
The STM32WB series targets ultra-low-power wireless applications demanding secure, certified BLE 5.x connectivity with minimal external components-optimized for battery-operated IoT endpoints where size, power, and regulatory compliance are critical.
FAQ
What is the maximum operating frequency of the Cortex-M4 core in the STM32WB10CCU5?
The Cortex-M4 core operates at up to 64 MHz with FPU and DSP extensions. Its performance is enhanced by the Adaptive Real-Time (ART) Accelerator, which enables zero-wait-state execution from flash memory. This frequency is sustained across the full operating voltage range (2.0–3.6 V) and temperature range (-10 °C to +85 °C), as verified in DS13259 Rev 7 Section 6.3.1.
Does the STM32WB10CCU5 support Bluetooth 5.4 features such as EATT and GATT caching?
Yes, the STM32WB10CCU5 fully supports Bluetooth 5.4 features including Enhanced Attribute Protocol (EATT) and GATT caching. These are implemented in the dedicated Cortex-M0+ radio coprocessor, enabling concurrent attribute transactions and reduced host interaction. Support is confirmed in the device's functional overview (Section 3.6.2) and RF subsystem description (DS13259 Rev 7, p.18).
How does the integrated balun affect RF design and layout requirements?
The integrated balun eliminates the need for external matching components (e.g., LC networks or discrete baluns), reducing BOM count and PCB area. Layout requires direct connection of RF_P/RF_N pins to the antenna feed point via 50 Ω controlled-impedance traces with minimal stub length (<2 mm) and strict grounding per AN5027. No external balun or matching circuit is needed for basic 2.4 GHz operation.
What security mechanisms protect firmware and BLE stack execution on this MCU?
Firmware and BLE stack protection is enforced via Secure Firmware Installation (SFI), PCROP flash sector protection, hardware AES-256 encryption engines, and Public Key Authority (PKA) for RSA/ECC operations. The 96-bit unique die ID and IEEE 64-bit EUI support device identity binding. These mechanisms are documented in Sections 3.4 and 6.3.4 of DS13259 Rev 7 and validated in ST's SFI certification reports.
STM32WB10CCU5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 48-UFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- TxRx + MCU
- RF Family/Standard:
- Bluetooth
- Protocol:
- Bluetooth v5.3
- Modulation:
- GFSK
- Frequency:
- 2.4GHz
- Data Rate (Max):
- 1Mbps
- Power - Output:
- 4dBm
- Sensitivity:
- -95.5dBm
- Memory Size:
- 320kB Flash, 48kB SRAM
- Serial Interfaces:
- ADC, I2C, SPI, UART, USART
- GPIO:
- 30
- Voltage - Supply:
- 2V ~ 3.6V
- Current - Receiving:
- 7.7mA
- Current - Transmitting:
- 8.7mA ~ 11.9mA
- Operating Temperature:
- -10°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 48-UFQFPN (7x7)
STM32WB10CCU5 FAQ
1.How can I place an order for STM32WB10CCU5 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32WB10CCU5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32WB10CCU5 reliable?
The price and inventory of STM32WB10CCU5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32WB10CCU5 is usually 5 days.
3.What payment methods are accepted for STM32WB10CCU5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32WB10CCU5 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32WB10CCU5?
STM32WB10CCU5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32WB10CCU5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32WB10CCU5?
For technical support, including STM32WB10CCU5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32WB10CCU5 requirements.
6.How does Aetrix verify that STM32WB10CCU5 is sourced from the original manufacturer or authorized distributors?
All STM32WB10CCU5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32WB10CCU5 meets industry standards.
7.What is the process for return or replacement of STM32WB10CCU5?
All STM32WB10CCU5 units undergo pre-shipment inspection (PSI). If there is an issue with STM32WB10CCU5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32WB10CCU5 part is unused and in its original packaging.
Return procedure for STM32WB10CCU5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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