STMicroelectronics STM32WB55CCU7
- Part No.:
- STM32WB55CCU7
- Manufacturer:
- STMicroelectronics
- Category:
- RF Transceiver ICs
- Package:
- 48-UFQFN Exposed Pad
- Datasheet:
-
STM32WB55CCU7.pdf
- Description:
- IC RF TXRX+MCU 802.15.4 48UFQFPN
- Quantity:
- Payment:

- Shipping:

Inventory:4,770
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32WB55CCU7 from STMicroelectronics is a dual-core multiprotocol wireless MCU integrating an Arm® Cortex®-M4 with FPU (64 MHz) and a dedicated Cortex®-M0+ radio controller, supporting Bluetooth® 5.4 and IEEE 802.15.4 PHY/MAC (Thread 1.3, Zigbee® 3.0), with -96 dBm BLE RX sensitivity, +6 dBm programmable TX power, and ultra-low-power operation down to 13 nA in shutdown mode. It targets secure, battery-operated IoT edge nodes requiring concurrent application processing and certified RF stack execution.
For engineers reviewing the STM32WB55CCU7 datasheet, STM32WB55CCU7 pinout, STM32WB55CCU7 application, or STM32WB55CCU7 equivalent, key selection criteria include dual-CPU real-time radio coexistence, integrated SMPS for sub-µA standby current (600 nA + RTC + 32 KB RAM), hardware AES-256 and PKA acceleration, and QFN48 package compatibility with production-ready RF matching (e.g., MLPF-WB-01E3).
Technical Context
The device implements a tightly coupled dual-CPU architecture: the Cortex-M4 executes application firmware while the Cortex-M0+ handles real-time Bluetooth Low Energy and 802.15.4 protocol stack layers via IPCC interprocessor communication. Radio subsystem includes integrated balun, 2.4 GHz transceiver with GATT caching and EATT support, and accurate RSSI for closed-loop TX power control.
Power management features an embedded SMPS with intelligent bypass mode, five-level BOR, and seven low-power modes - including Stop mode at 2.1 µA with 256 KB RAM retention and active-mode MCU consumption below 53 µA/MHz (RF + SMPS enabled). Clock system combines 32 MHz crystal oscillator (with trimming capacitors), 32 kHz LSE for RTC, and auto-trimmed multispeed internal RC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: Arm Cortex-M4 @ 64 MHz (FPU, ART Accelerator) + Cortex-M0+ @ 32 MHz (dedicated radio layer) |
| Wireless Protocols | Bluetooth 5.4 (LE), IEEE 802.15.4-2011 PHY/MAC, Thread 1.3, Zigbee 3.0 - all supported concurrently in firmware |
| RF Performance | RX sensitivity: -96 dBm (BLE 1 Mbps), -100 dBm (802.15.4); TX output: programmable up to +6 dBm in 1 dB steps |
| Memory | 512 KB flash (sector-protected PCROP), 256 KB SRAM (64 KB with hardware parity), 1 KB OTP, Quad-SPI XIP interface |
| Low-Power Modes | Shutdown: 13 nA; Standby: 600 nA (RTC + 32 KB RAM); Stop: 2.1 µA (RTC + 256 KB RAM) |
| Security | 3× AES-256 engines, HW PKA (RSA/ECC/DH), TRNG, 96-bit unique ID, secure firmware installation (SFI) for radio stacks |
| Package | UFQFPN48 (7 × 7 mm, 0.4 mm pitch), RoHS-compliant, ECOPACK2 |
Pinout & Package
STM32WB55CCU7 is housed in a 48-pin Ultra-Fine Pitch Quad Flat No-lead (UFQFPN) package with 0.4 mm pitch and 7 × 7 mm body size. The package supports solder reflow per JEDEC J-STD-020 and provides 72 fast I/Os (70 of which are 5 V-tolerant), including dedicated RF pins (RF_IO, RF_VDD, RF_GND) and dual crystal inputs (HSE/HSI48, LSE).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD, VSS | Main power supply / ground | 1.71–3.6 V core supply; decoupling required per datasheet layout guidelines for RF stability |
| RF_IO | RF transceiver antenna interface | Differential RF port requiring external matching network (e.g., MLPF-WB-01E3) or integrated balun path |
| HSE_IN / HSE_OUT | 32 MHz crystal oscillator input/output | Drives both CPU and radio clock domains; integrated trimming capacitors eliminate external load caps |
| LSE_IN / LSE_OUT | 32.768 kHz RTC crystal interface | Enables calendar RTC with <±2 ppm accuracy over -40°C to +85°C temperature range |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with standard push-button or microcontroller-driven reset sequencing |
| SWDIO / SWCLK | Serial Wire Debug interface | Supports full debug visibility into both M4 and M0+ cores, including cross-triggering and trace macrocell |
Key Features
| Feature | Design Value |
|---|---|
| Dual-CPU Real-Time Radio Isolation | Cortex-M0+ offloads BLE/802.15.4 link-layer timing-critical tasks, freeing M4 for application logic without RTOS jitter |
| Integrated RF Front-End | Built-in balun reduces external component count; supports 2 Mbps data rate and advertising extensions for beacon scalability |
| Ultra-Low-Power SMPS | Embedded step-down converter achieves 600 nA standby current with RTC + 32 KB RAM retention - critical for >10-year coin-cell operation |
| Hardware Security Engine | AES-256, PKA, and TRNG enable FIPS-compliant key generation, encrypted OTA updates, and secure boot verification |
| OTA Update Support | Native Bluetooth LE and 802.15.4 OTA firmware update capability with atomic flash sector swap and rollback protection |
Applications
| Smart Home Sensor Node | Industrial Wireless Gateway |
|---|---|
Use Scenario: Battery-powered temperature/humidity sensor transmitting data every 5 minutes to a central hub via BLE mesh or Thread. IC Role / Device Role / Timing Role: Dual-core MCU executes sensor fusion algorithm on M4 while M0+ manages BLE advertising, connection establishment, and GATT caching. Use Value: 600 nA standby current enables >5-year CR2032 battery life; integrated balun eliminates RF tuning labor during manufacturing. |
Use Scenario: Edge gateway aggregating Modbus RTU data from legacy PLCs and forwarding via Thread to cloud via Wi-Fi router. IC Role / Device Role / Timing Role: M4 runs Linux-compatible Zephyr RTOS and protocol translation; M0+ handles time-synchronized 802.15.4 MAC layer with EATT for multi-attribute writes. Use Value: Hardware AES-256 accelerates TLS handshake for secure cloud uplink; 256 KB SRAM retains full routing table and session state across deep sleep cycles. |
| Medical Wearable Monitor | Asset Tracking Tag |
Use Scenario: Chest-worn ECG patch streaming raw analog data to smartphone via BLE, with local arrhythmia detection. IC Role / Device Role / Timing Role: M4 performs real-time DSP filtering and ML inference; M0+ maintains BLE connection with minimal latency for urgent alert transmission. Use Value: 12-bit ADC at 4.26 Msps captures high-fidelity biosignals; 2.1 µA Stop mode preserves RAM context during intermittent sensing bursts. |
Use Scenario: GPS-denied indoor asset tag reporting location via BLE proximity beacons and 802.15.4-based AoA/AoD triangulation. IC Role / Device Role / Timing Role: M4 manages motion-triggered wake-up and sensor fusion; M0+ executes precise timestamping for RF-based ranging protocols. Use Value: Accurate RSSI and hardware timestamping enable ±1 m indoor positioning; shutdown mode (13 nA) extends shelf life before deployment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core wireless MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Nordic nRF52840-QIAA | Single-core ARM Cortex-M4F @ 64 MHz; no dedicated radio CPU - BLE/802.15.4 stack runs on same core | Limited real-time determinism for concurrent BLE + Thread; lower memory (1 MB flash, 256 KB RAM) but higher TX power (+8 dBm) | Prefer when cost-sensitive designs accept software-managed radio scheduling and lack need for hardware-isolated protocol stacks |
| TI CC2652R1F | Arm Cortex-M4F @ 48 MHz + dedicated Sensor Controller Engine (SCE); proprietary BLE stack only - no native 802.15.4 MAC | Requires external MCU for Thread/Zigbee; superior RF sensitivity (-102 dBm) but no hardware PKA or SFI for secure OTA | Choose for BLE-only industrial sensors needing ultra-low RX current (5.9 mA active) and long-range connectivity without multi-protocol flexibility |
Compared with nRF52840-QIAA and CC2652R1F, STM32WB55CCU7 uniquely delivers hardware-isolated dual-CPU execution for certified BLE + Thread concurrency, integrated SMPS enabling sub-µA standby, and comprehensive security peripherals - making it optimal for production-grade, field-upgradable multi-protocol IoT endpoints.
Availability
STM32WB55CCU7 is available at Aetrix Electronics and suitable for smart home sensor nodes, industrial wireless gateways, medical wearables, and asset tracking tags requiring stable component supply, long-term lifecycle assurance, and qualified RF performance.
Supply support for STM32WB55CCU7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog devices for industrial, automotive, and consumer markets.
The STM32WB series is ST's wireless MCU product line engineered specifically for secure, low-power, multi-protocol IoT edge devices - combining dual-core processing, certified RF stacks, and hardware security in a single die.
FAQ
Does STM32WB55CCU7 support over-the-air firmware updates for both application and radio stack?
Yes. STM32WB55CCU7 supports secure OTA updates for both application firmware and pre-certified Bluetooth LE and IEEE 802.15.4 radio stacks using its built-in bootloader and hardware AES encryption. Updates are atomic, with rollback protection and signature verification enforced by the Secure Firmware Installation (SFI) mechanism.
What RF matching components are recommended for STM32WB55CCU7 in UFQFPN48 package?
ST recommends the MLPF-WB-01E3 integrated passive device (IPD) for simplified RF front-end design. This 0201-size component integrates matching network, harmonic filter, and ESD protection optimized for STM32WB55CCU7's RF_IO pin, eliminating discrete tuning and reducing PCB footprint by >50% versus discrete solutions.
Can the Cortex-M0+ core be used for custom real-time tasks beyond the radio stack?
Yes. While the M0+ is preloaded with ST's certified BLE/802.15.4 stack, its firmware is user-accessible and extensible. Developers may replace or augment the default stack with custom real-time firmware - for example, proprietary low-latency protocols - using ST's OpenThread and BlueNRG-MS SDKs and IPCC messaging.
Is the 32 MHz HSE crystal oscillator truly capacitor-less in STM32WB55CCU7?
Yes. The HSE oscillator includes integrated trimming capacitors (12 pF nominal), allowing direct connection of a standard 32 MHz fundamental-mode crystal without external load capacitors. This reduces BOM count and improves yield in high-volume manufacturing, as confirmed in Section 3.10 and Table 6 of DS11929 Rev 18.
STM32WB55CCU7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- STM32WB
- Package/Case:
- 48-UFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- TxRx + MCU
- RF Family/Standard:
- 802.15.4, Bluetooth
- Protocol:
- Bluetooth v5.3, Thread, Zigbee®
- Modulation:
- GFSK
- Frequency:
- 2.405GHz ~ 2.48GHz
- Data Rate (Max):
- 2Mbps
- Power - Output:
- 6dBm
- Sensitivity:
- -100dBm
- Memory Size:
- 256kB Flash, 128kB SRAM
- Serial Interfaces:
- ADC, I2C, SPI, UART, USART, USB
- GPIO:
- 30
- Voltage - Supply:
- 1.71V ~ 3.6V
- Current - Receiving:
- 4.5mA ~ 7.9mA
- Current - Transmitting:
- 5.2mA ~ 12.7mA
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 48-UFQFPN (7x7)
STM32WB55CCU7 FAQ
1.How can I place an order for STM32WB55CCU7 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32WB55CCU7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32WB55CCU7 reliable?
The price and inventory of STM32WB55CCU7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32WB55CCU7 is usually 5 days.
3.What payment methods are accepted for STM32WB55CCU7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32WB55CCU7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32WB55CCU7?
STM32WB55CCU7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32WB55CCU7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32WB55CCU7?
For technical support, including STM32WB55CCU7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32WB55CCU7 requirements.
6.How does Aetrix verify that STM32WB55CCU7 is sourced from the original manufacturer or authorized distributors?
All STM32WB55CCU7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32WB55CCU7 meets industry standards.
7.What is the process for return or replacement of STM32WB55CCU7?
All STM32WB55CCU7 units undergo pre-shipment inspection (PSI). If there is an issue with STM32WB55CCU7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32WB55CCU7 part is unused and in its original packaging.
Return procedure for STM32WB55CCU7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32WB55CCU7 Tags

-
ESP32-D0WD-V3
Espressif Systems

-
ESP8266EX
Espressif Systems

-
ESP32-S3
Espressif Systems

-
NRF24L01P-R7
Nordic Semiconductor ASA

-
NRF24L01P-R
Nordic Semiconductor ASA

-
ESP32-U4WDH
Espressif Systems

-
DA14531-00000OG2
Renesas

-
ESP32-C6FH4
Espressif Systems

-
DA14531-00000FX2
Renesas

-
NRF24L01P-T
Nordic Semiconductor ASA

-
NRF52810-QCAA-R
Nordic Semiconductor ASA

-
ESP32-S3FN8
Espressif Systems
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
