STMicroelectronics STM32WB55VGQ6TR
- Part No.:
- STM32WB55VGQ6TR
- Manufacturer:
- STMicroelectronics
- Category:
- RF Transceiver ICs
- Package:
- 129-UFBGA
- Datasheet:
-
STM32WB55VGQ6TR.pdf
- Description:
- IC RF TXRX+MCU 802.15.4 129UFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:4,808
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32WB55VGQ6TR from STMicroelectronics is a dual-core multiprotocol wireless 32-bit MCU integrating an Arm® Cortex®-M4 with FPU (64 MHz) and a dedicated Cortex®-M0+ radio controller, supporting Bluetooth® 5.4 and IEEE 802.15.4 PHY/MAC for Thread 1.3 and Zigbee® 3.0. It delivers -96 dBm RX sensitivity (BLE 1 Mbps), +6 dBm programmable TX power, and ultra-low-power operation down to 13 nA in shutdown mode. Used in battery-powered IoT edge nodes requiring secure over-the-air updates and concurrent protocol stack execution.
For engineers reviewing the STM32WB55VGQ6TR datasheet, STM32WB55VGQ6TR pinout, STM32WB55VGQ6TR application, or STM32WB55VGQ6TR equivalent, key selection criteria include dual-CPU architecture for real-time radio co-processing, integrated SMPS with intelligent bypass, hardware AES-256 and PKA acceleration, and RF regulatory compliance (FCC/ETSI/ARIB).
Technical Context
The device implements a tightly coupled dual-CPU architecture: the Cortex-M4 executes application firmware while the Cortex-M0+ handles time-critical BLE/802.15.4 link-layer operations via IPCC interprocessor messaging. Radio subsystem includes integrated balun, RSSI-based closed-loop TX power control, and support for advertising extensions and EATT.
Power management integrates a high-efficiency SMPS step-down converter with automatic bypass mode, five selectable BOR thresholds, and seven low-power modes - including Stop mode with RTC + 256 KB RAM at 2.1 µA. Clock system combines 32 MHz crystal oscillator (radio/CPU clock), 32 kHz LSE for RTC, and auto-trimmed multispeed internal RC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: Arm Cortex-M4 @ 64 MHz (FPU, ART Accelerator) + Cortex-M0+ @ 32 MHz (dedicated radio layer) |
| Wireless Protocols | Bluetooth 5.4 (LE), IEEE 802.15.4-2011 PHY/MAC - enabling Thread 1.3 and Zigbee 3.0 stacks |
| RF Performance | -96 dBm RX sensitivity (BLE 1 Mbps); -100 dBm (802.15.4); programmable TX output up to +6 dBm in 1 dB steps |
| Memory | 1 MB flash (sector PCROP protection), 256 KB SRAM (64 KB with hardware parity) |
| Power Modes | 13 nA shutdown; 600 nA standby + RTC + 32 KB RAM; 2.1 µA Stop + RTC + 256 KB RAM |
| Security | 3× hardware AES-256 engines, PKA for RSA/ECC/DH, true RNG, 96-bit unique ID, SFI for secure stack installation |
| Peripherals | 72 GPIOs (70 × 5 V-tolerant), 12-bit ADC @ 4.26 Msps, 2× comparators, USB 2.0 FS (crystal-less), SAI, QSPI XIP, touch sensing (18 channels) |
Pinout & Package
STM32WB55VGQ6TR is housed in a 100-ball WLCSP package (0.4 mm pitch, 7 × 7 mm footprint) optimized for compact IoT designs. Pin assignments are validated per STMicroelectronics datasheet DS11929 Rev 18, Table 16.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Main power supply | 1.71–3.6 V input for digital/analog domains; supports SMPS or LDO regulation |
| VSS | Ground reference | Digital and analog ground planes must be connected at single point near SMPS output |
| RF_IO | RF transceiver I/O | Differential RF port requiring external matching network or MLPF-WB-01E3 IPD filter |
| OSC_IN / OSC_OUT | 32 MHz crystal interface | Drives both CPU and radio clocks; integrated trimming capacitors eliminate external load caps |
| LSE_IN / LSE_OUT | 32.768 kHz RTC crystal | Enables calendar RTC with <1 ppm drift over industrial temperature range (-40°C to +85°C) |
| BOOT0 | Boot mode selection | Pulled low for main flash boot; high for system memory bootloader (USART/SPI/I2C/USB OTA update) |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core real-time radio processing | Separate Cortex-M0+ offloads BLE/802.15.4 link-layer timing constraints, freeing M4 for application logic |
| Integrated RF balun | Reduces external BOM count by eliminating discrete balun components; maintains impedance match across 2.4 GHz band |
| Hardware-accelerated security | AES-256, PKA, and RNG enable certified secure boot, encrypted OTA updates, and device identity attestation |
| Ultra-low-power SMPS | Embedded step-down converter achieves >85% efficiency at 10 mA; intelligently bypasses to LDO in light-load conditions |
| GATT caching & EATT support | Reduces host-side memory footprint and improves ATT transaction throughput for complex BLE profiles |
Applications
| Smart Home Sensor Node | Industrial Wireless Gateway |
|---|---|
Use Scenario: Battery-powered temperature/humidity/motion sensor transmitting data every 5 minutes to a central hub via BLE mesh. IC Role / Device Role / Timing Role: Dual-core MCU manages sensor acquisition, local data fusion, BLE advertising, and secure connection establishment - all within sub-10 µA average current budget. Use Value: Integrated SMPS and 600 nA standby mode extend CR2032 battery life beyond 5 years; GATT caching minimizes connection overhead during periodic reporting. | Use Scenario: Edge gateway collecting data from multiple 802.15.4 end devices (e.g., smart meters, valve actuators) and forwarding to cloud via Wi-Fi/Ethernet. IC Role / Device Role / Timing Role: Acts as Thread Border Router: M0+ handles 802.15.4 MAC timing and frame filtering; M4 runs OpenThread stack and bridges to IPv6 transport. Use Value: Hardware AES-256 accelerates Thread encryption without CPU load; QSPI XIP enables fast loading of large routing tables from external flash. |
| Wearable Health Monitor | Asset Tracking Tag |
Use Scenario: Chest-worn ECG patch streaming raw biosignals to smartphone via BLE 5.4 LE Audio-compatible connection. IC Role / Device Role / Timing Role: Real-time signal acquisition (ADC @ 4.26 Msps), on-chip oversampling to 16-bit resolution, and low-latency BLE audio streaming using SAI + hardware EATT. Use Value: Crystal-less USB and SAI dual-channel audio interface reduce component count; 2.1 µA Stop mode preserves RAM state during sleep between sampling bursts. | Use Scenario: GPS-enabled logistics tag reporting location every 2 hours via BLE beaconing and periodic 802.15.4 uploads to nearby gateways. IC Role / Device Role / Timing Role: Manages multi-protocol scheduling: GPS fix acquisition, BLE advertising interval tuning, and synchronized 802.15.4 transmission windows using LPTIM2 and IPCC-triggered wakeups. Use Value: Accurate RSSI and programmable TX power enable adaptive beaconing range control; 96-bit unique ID ensures tamper-proof device identification in fleet management systems. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core wireless MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Nordic nRF52840 DK | Single-core ARM Cortex-M4F @ 64 MHz; no dedicated radio CPU; proprietary SoftDevice stack required | Limited concurrent protocol flexibility; lacks native Thread/Zigbee 3.0 certification out-of-box | Preferred for BLE-only designs where stack licensing cost and vendor lock-in are acceptable trade-offs |
| TI CC2652R1F | Arm Cortex-M4F @ 48 MHz + dedicated Sensor Controller; proprietary BLE/IEEE 802.15.4 stack; no native Thread support | Requires TI's SimpleLink SDK; lower RF output (+5 dBm max); no hardware PKA or SFI | Suitable for cost-sensitive industrial sensor nodes where TI ecosystem integration outweighs cryptographic limitations |
Compared with nRF52840 and CC2652R1F, STM32WB55VGQ6TR provides verified dual-CPU isolation for concurrent BLE/Thread stacks, integrated SMPS with bypass mode for wider input voltage tolerance, and full hardware crypto suite (AES/PKA/RNG) enabling PSA Level 3-certifiable firmware deployments.
Availability
STM32WB55VGQ6TR is available at Aetrix Electronics and suitable for smart home sensor nodes, industrial wireless gateways, wearable health monitors, and asset tracking tags requiring stable component supply across extended product lifecycles.
Supply support for STM32WB55VGQ6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, sensors, and automotive ICs with strong emphasis on energy efficiency and security.
The STM32WB series is designed specifically for ultra-low-power, multiprotocol wireless applications in constrained IoT endpoints - combining certified BLE 5.4 and Thread 1.3 stacks with robust hardware security and flexible power management.
FAQ
What wireless certifications does STM32WB55VGQ6TR support out-of-the-box?
STM32WB55VGQ6TR supports pre-certified Bluetooth 5.4 and IEEE 802.15.4 PHY/MAC layers compliant with FCC CFR47 Part 15, ETSI EN 300 328, EN 300 440, and ARIB STD-T66. Full system-level certification requires board-level validation, but the integrated RF front-end and balun significantly reduce antenna matching effort and test cycle time.
How is dual-core communication implemented between Cortex-M4 and Cortex-M0+?
Dual-core communication uses the Inter-Processor Communication Controller (IPCC), which implements mailbox-style message passing with hardware semaphores for resource synchronization. The M4 and M0+ share memory regions with cache coherency managed via the interconnect matrix, enabling deterministic latency for BLE/802.15.4 event handling without software polling.
Does STM32WB55VGQ6TR support over-the-air firmware updates for both application and radio stack?
Yes - STM32WB55VGQ6TR supports secure OTA updates for both application firmware and the Bluetooth Low Energy or 802.15.4 radio stack via its built-in bootloader. Updates are authenticated using hardware AES-256 and verified against stored public keys in OTP, ensuring integrity and preventing unauthorized stack modifications.
What external components are mandatory for basic RF operation?
Mandatory external components include a 32 MHz crystal (with optional integrated load caps), 32.768 kHz RTC crystal, decoupling capacitors (100 nF + 1 µF per VDD pair), and an RF matching network - either discrete components or ST's MLPF-WB-01E3 IPD filter. No external balun is needed due to on-die integration.
STM32WB55VGQ6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 129-UFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Type:
- TxRx + MCU
- RF Family/Standard:
- 802.15.4, Bluetooth
- Protocol:
- Bluetooth v5.3
- Modulation:
- -
- Frequency:
- 2.4GHz
- Data Rate (Max):
- 2Mbps
- Power - Output:
- 6dBm
- Sensitivity:
- -100dBm
- Memory Size:
- 1MB Flash, 256kB SRAM
- Serial Interfaces:
- ADC, GPIO, I2C, I2S, IrDA, SPI, UART, USART, USB
- GPIO:
- 72
- Voltage - Supply:
- 1.71V ~ 3.6V
- Current - Receiving:
- 4.5mA ~ 9.2mA
- Current - Transmitting:
- 4.5mA ~ 12.7mA
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 129-UFBGA (7x7)
STM32WB55VGQ6TR FAQ
1.How can I place an order for STM32WB55VGQ6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32WB55VGQ6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32WB55VGQ6TR reliable?
The price and inventory of STM32WB55VGQ6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32WB55VGQ6TR is usually 5 days.
3.What payment methods are accepted for STM32WB55VGQ6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32WB55VGQ6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32WB55VGQ6TR?
STM32WB55VGQ6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32WB55VGQ6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32WB55VGQ6TR?
For technical support, including STM32WB55VGQ6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32WB55VGQ6TR requirements.
6.How does Aetrix verify that STM32WB55VGQ6TR is sourced from the original manufacturer or authorized distributors?
All STM32WB55VGQ6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32WB55VGQ6TR meets industry standards.
7.What is the process for return or replacement of STM32WB55VGQ6TR?
All STM32WB55VGQ6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32WB55VGQ6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32WB55VGQ6TR part is unused and in its original packaging.
Return procedure for STM32WB55VGQ6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32WB55VGQ6TR Tags

-
ESP32-D0WD-V3
Espressif Systems

-
ESP8266EX
Espressif Systems

-
ESP32-S3
Espressif Systems

-
NRF24L01P-R7
Nordic Semiconductor ASA

-
NRF24L01P-R
Nordic Semiconductor ASA

-
ESP32-U4WDH
Espressif Systems

-
DA14531-00000OG2
Renesas

-
ESP32-C6FH4
Espressif Systems

-
DA14531-00000FX2
Renesas

-
NRF24L01P-T
Nordic Semiconductor ASA

-
NRF52810-QCAA-R
Nordic Semiconductor ASA

-
ESP32-S3FN8
Espressif Systems
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
