STMicroelectronics STM32WL33K8V7
- Part No.:
- STM32WL33K8V7
- Manufacturer:
- STMicroelectronics
- Category:
- RF Transceiver ICs
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
STM32WL33K8V7.pdf
- Description:
- VFQFPN 5X5X1.0 32L PITCH 0.5
- Quantity:
- Payment:

- Shipping:

Inventory:150
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM32WL33K8V7 from STMicroelectronics is an ultra-low-power, multiprotocol sub-1 GHz wireless system-on-chip integrating an Arm® Cortex®-M0+ 32-bit MCU (64 MHz max), 64 KB flash, 16 KB SRAM, and a fully configurable RF transceiver supporting 2(G)FSK/4(G)FSK/OOK/ASK/D-BPSK modulation across 159–958 MHz bands. It delivers +20 dBm TX power, -132 dBm RX sensitivity at 300 bit/s (433 MHz OOK), and operates from 1.7–3.6 V in -40°C to +105°C for battery-powered LPWAN edge nodes.
For engineers reviewing the STM32WL33K8V7 datasheet, STM32WL33K8V7 pinout, STM32WL33K8V7 application, or STM32WL33K8V7 equivalent, this device supports certified global deployments (ETSI EN 300 220, FCC Part 15/90, ARIB STD T67/T108), autonomous wakeup via LPAWUR (-54 dBm sensitivity, 4 µA), and hardware-accelerated AES-128 with TRNG - critical for secure, long-life IoT sensor and metering designs.
Technical Context
The STM32WL33K8V7 implements a tightly coupled dual-domain architecture: the Cortex-M0+ core executes application and protocol stack code while sharing memory-mapped AHB access with a dedicated digital RF subsystem (MR_SUBG) and analog RF front-end (RFSUBG). Its bus matrix enables concurrent CPU, DMA, and radio operations without arbitration stalls.
RF operation is managed by a fully configurable hardware sequencer enabling autonomous low-duty-cycle modes (Sniff, Listen-Before-Talk, Frequency Hopping), while the LPAWUR block operates independently in Deepstop mode using only the 32 kHz clock domain - decoupling wake-up latency from main CPU state transitions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | Arm® Cortex®-M0+, 64 MHz max - enables real-time protocol processing with <1.6 µs interrupt latency for time-critical LPWAN frame handling. |
| Memory | 64 KB flash / 16 KB SRAM (full retention) - sufficient for dual-stack implementations (e.g., LoRaWAN + proprietary) with retained context across Deepstop wake-ups. |
| RF Bands | 159–185 MHz, 413–479 MHz, 826–958 MHz - covers global ISM/SRD bands including 433 MHz (EU), 868 MHz (EU), 915 MHz (US), and 920 MHz (JP) without external synthesizer. |
| RX Sensitivity | -132 dBm @ 300 bit/s (433 MHz OOK) - achieves >15 km range in rural line-of-sight with omnidirectional antenna and 10 dB link margin. |
| TX Power | +20 dBm programmable - drives standard 50 Ω antenna directly, eliminating need for external PA in most Class 1 ETSI/FCC-compliant node designs. |
| LPAWUR | -54 dBm OOK sensitivity, 4 µA always-on current - extends battery life to >10 years in periodic wake-up sensor applications (e.g., monthly temperature reporting). |
| Power Modes | 14 nA Shutdown, 960 nA Deepstop - enables multi-year operation on CR2032 coin cell when paired with LPAWUR-triggered duty cycling. |
Pinout & Package
VFQFPN32 (5 × 5 mm, 0.5 mm pitch) package with 17 GPIOs - all support retention and wakeup capability, optimized for compact LPWAN node PCB layouts requiring minimal board area and BOM count.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PA0–PA15, PB0–PB1 | General-purpose I/O | All 17 pins support EXTI wakeup, RTC alarm, and analog functions (ADC/DAC/LCD); retain state in Deepstop for instant peripheral reinitialization. |
| PA8 / PA11 / PB14 | RX_SEQUENCE / TX_SEQUENCE | Dedicated hardware signals indicating active RX/TX - used to control external RF switches or synchronize coexisting radios (e.g., BLE/Wi-Fi) without software overhead. |
| PA10 | SWDIO | Single-wire debug interface - enables field firmware updates and secure bootloader activation without exposing full SWD port. |
| VDD, VDDA, VSS | Power supply | Separate analog/digital domains with internal LDO regulation; supports direct connection to single 1.8–3.6 V battery source with no external regulators required. |
| VFBSD | SMPS output | Configurable step-down converter output (1.2–2.4 V); bypassable via BOF mode to maximize RX sensitivity by eliminating SMPS switching noise during reception. |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Sequencer | Autonomous radio state machine enabling Sniff, LBT, and frequency hopping without CPU intervention - reduces average current by >40% in duty-cycled sensor nodes. |
| LPAWUR Frame Decoder | Dedicated Manchester OOK decoder with 40-bit sync + 8-bit 0x99 frame sync + 56-bit payload + 16-bit CRC - eliminates false wakeups and ensures deterministic <50 µs wake-to-RX latency. |
| RF Front-End Architecture | Low-IF RX with complex I/Q path and AGC, plus polar TX modulation - enables >80 dB adjacent channel rejection per ETSI EN 300 220 Cat 1 and robust operation in dense RF environments. |
| Security Engine | AES-128 co-processor + 16-bit TRNG + write-protection lock for OTP and flash - meets EAL4+ requirements for firmware integrity and key storage in certified metering applications. |
| LC Sensor Controller | Autonomous rotary flow metering engine - measures turbine rotation via LC resonance shift, freeing CPU for RF tasks and extending battery life in heat cost allocators. |
Applications
| Asset Tracking | Wireless Sensors |
|---|---|
|
Use Scenario: GPS-denied indoor/outdoor pallet or container monitoring with periodic location reporting. IC Role / Device Role / Timing Role: Sub-1 GHz SoC managing GNSS assist data parsing, accelerometer wake triggers, and adaptive TX power control based on RSSI feedback. Use Value: -132 dBm sensitivity enables reliable 2 km urban range at 10 dBm; LPAWUR cuts idle current to 4 µA, extending CR123A battery life to 5+ years. |
Use Scenario: Battery-powered temperature/humidity node in HVAC ducts with 15-minute reporting intervals. IC Role / Device Role / Timing Role: Integrated 12-bit ADC (1 MSPS) samples sensor bridge, while hardware sequencer schedules 868 MHz FSK transmission only after stable reading acquisition. Use Value: 960 nA Deepstop + LPAWUR wake eliminates polling overhead; 1.7–3.6 V operation tolerates 20% battery voltage drop over 7-year deployment. |
| Remote Metering | Smart Home Alarms |
|
Use Scenario: Water/gas meter with pulse counting and ultrasonic flow sensing in utility-grade enclosures. IC Role / Device Role / Timing Role: LC sensor controller autonomously tracks turbine rotation; AES-128 encrypts consumption data before 169 MHz W-MBUS transmission. Use Value: Hardware-accelerated W-MBUS stack reduces CPU load by 70%; +20 dBm TX ensures penetration through concrete meter pits with >100 m range. |
Use Scenario: Door/window contact sensor with tamper detection and encrypted alarm reporting to gateway. IC Role / Device Role / Timing Role: Comparator monitors reed switch state; LPAWUR listens for "open" event while main core remains in Shutdown (14 nA), waking only to transmit encrypted frame. Use Value: 14 nA shutdown current enables 10+ year CR2032 life; OOK modulation provides lowest possible RX current for always-on security monitoring. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar sub-GHz wireless MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SX1280 + STM32L0 | Discrete RF + MCU solution; SX1280 supports 2.4 GHz and LoRa, but lacks integrated AES/TRNG and requires external flash for protocol stacks. | Higher BOM count and PCB area; suitable for designs needing 2.4 GHz coexistence or LoRa modulation not supported by STM32WL33K8V7. | Select when 2.4 GHz band operation or LoRa PHY layer flexibility outweighs integration benefits and security acceleration. |
| CC1352P7 | TI SimpleLink device with integrated 2.4 GHz + sub-1 GHz radios; supports IEEE 802.15.4g but lacks OOK/ASK and has lower max TX power (+14 dBm). | Built-in TI RTOS and TI-RTOS drivers simplify development, but limited to TI ecosystem tools and lacks ST's W-MBUS/Sigfox certification support. | Prefer for projects already using TI's CCStudio toolchain and requiring dual-band (2.4 GHz + sub-GHz) in single chip, accepting reduced sensitivity and no OOK support. |
Compared with SX1280+STM32L0 and CC1352P7, the STM32WL33K8V7 delivers superior RF integration (single-die transceiver + MCU), best-in-class -132 dBm sensitivity for long-range sub-GHz links, and hardware-enforced security essential for utility metering certifications - reducing design risk and time-to-certification.
Availability
STM32WL33K8V7 is available at Aetrix Electronics and suitable for asset tracking, remote metering, and smart home alarm systems requiring stable component supply, long-term lifecycle assurance, and global regulatory compliance (ETSI, FCC, ARIB).
Supply support for STM32WL33K8V7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog devices for industrial, automotive, and IoT markets.
The STM32WL33xx product line targets ultra-low-power LPWAN endpoints, combining Arm Cortex-M0+ compute with certified sub-GHz radio and hardware security to accelerate development of battery-operated, globally deployable IoT nodes.
FAQ
What is the maximum certified TX power and corresponding current draw for STM32WL33K8V7?
The STM32WL33K8V7 supports up to +20 dBm output power in TX+TXHP mode, drawing 78 mA from VDD at that level. At +10 dBm (standard TX mode), current consumption is 8 mA. This is measured under 3.3 V supply with matched 50 Ω load and complies with ETSI EN 300 220 Category 1 limits.
Does STM32WL33K8V7 support over-the-air (OTA) firmware updates via its sub-GHz radio?
Yes - the device supports secure OTA updates using its integrated bootloader, AES-128 encryption, and flash write protection. Updates are delivered via standardized protocols like W-MBUS or proprietary FSK frames; the hardware sequencer manages radio timing while the Cortex-M0+ verifies and writes new firmware to designated flash sectors.
How does the LPAWUR differ from standard RF wakeup in terms of power and latency?
LPAWUR operates at 4 µA continuous current with -54 dBm OOK sensitivity and guarantees <50 µs wake-to-RX latency. Unlike standard RF wakeup that requires CPU involvement, LPAWUR uses a dedicated analog/digital IP block that remains active in Deepstop mode, independent of main clock domains or flash state - enabling true zero-software-latency wake events.
Which global wireless standards are pre-certified for STM32WL33K8V7?
The STM32WL33K8V7 is pre-certified for ETSI EN 300 220 (Europe), FCC Part 15.247 and Part 90 (USA), and ARIB STD-T67/T108 (Japan). These cover 433 MHz, 868 MHz, and 920 MHz bands respectively, and include conformance testing for modulation accuracy, spurious emissions, and adjacent channel selectivity.
STM32WL33K8V7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- STM32WL33xx
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- -
- Type:
- TxRx + MCU
- RF Family/Standard:
- 802.15.4
- Protocol:
- KNX, LPWAN, Sigfox, Zigbee®
- Modulation:
- 2-FSK, 2-GFSK, 4-FSK, 4-GFSK, ASK, DBPSK, DSSS, OOK
- Frequency:
- 413MHz ~ 479MHz, 826MHz ~ 958MHz
- Data Rate (Max):
- 600kbps
- Power - Output:
- 20dBm
- Sensitivity:
- -132dBm
- Memory Size:
- 256kB Flash, 32kB SRAM
- Serial Interfaces:
- GPIO, I2C, I2S, IrDA, JTAG, PCM, PWM, SPI, UART, USART
- GPIO:
- 32
- Voltage - Supply:
- 1.7V ~ 3.6V
- Current - Receiving:
- 4mA
- Current - Transmitting:
- 10mA ~ 80mA
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 32-VFQFPN (5x5)
STM32WL33K8V7 FAQ
1.How can I place an order for STM32WL33K8V7 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32WL33K8V7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32WL33K8V7 reliable?
The price and inventory of STM32WL33K8V7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32WL33K8V7 is usually 5 days.
3.What payment methods are accepted for STM32WL33K8V7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32WL33K8V7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32WL33K8V7?
STM32WL33K8V7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32WL33K8V7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32WL33K8V7?
For technical support, including STM32WL33K8V7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32WL33K8V7 requirements.
6.How does Aetrix verify that STM32WL33K8V7 is sourced from the original manufacturer or authorized distributors?
All STM32WL33K8V7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32WL33K8V7 meets industry standards.
7.What is the process for return or replacement of STM32WL33K8V7?
All STM32WL33K8V7 units undergo pre-shipment inspection (PSI). If there is an issue with STM32WL33K8V7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32WL33K8V7 part is unused and in its original packaging.
Return procedure for STM32WL33K8V7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM32WL33K8V7 Tags

-
ESP32-D0WD-V3
Espressif Systems

-
ESP8266EX
Espressif Systems

-
ESP32-S3
Espressif Systems

-
NRF24L01P-R7
Nordic Semiconductor ASA

-
NRF24L01P-R
Nordic Semiconductor ASA

-
ESP32-U4WDH
Espressif Systems

-
DA14531-00000OG2
Renesas

-
ESP32-C6FH4
Espressif Systems

-
DA14531-00000FX2
Renesas

-
NRF24L01P-T
Nordic Semiconductor ASA

-
NRF52810-QCAA-R
Nordic Semiconductor ASA

-
ESP32-S3FN8
Espressif Systems
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
