STMicroelectronics STM32WL33KBV7TR
- Part No.:
- STM32WL33KBV7TR
- Manufacturer:
- STMicroelectronics
- Category:
- RF Transceiver ICs
- Package:
- 32-VFQFN Exposed Pad
- Datasheet:
-
STM32WL33KBV7TR.pdf
- Description:
- IC RF TXRX+MCU 802.15.4 32VFQFPN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32WL33KBV7TR from STMicroelectronics is an ultra-low-power, multiprotocol sub-1 GHz wireless system-on-chip integrating an Arm® Cortex®-M0+ 32-bit MCU (64 MHz max), 256 KB flash, 32 KB SRAM, and a fully configurable RF transceiver supporting 2(G)FSK/4(G)FSK/OOK/ASK/D-BPSK across 159–958 MHz bands. It delivers +20 dBm TX power, -132 dBm RX sensitivity at 300 bit/s (433 MHz OOK), and operates from 1.7–3.6 V in -40°C to +105°C for battery-powered LPWAN endpoints.
For engineers reviewing the STM32WL33KBV7TR datasheet, STM32WL33KBV7TR pinout, STM32WL33KBV7TR application, or STM32WL33KBV7TR equivalent, this device serves as a single-chip solution for certified sub-GHz wireless sensor nodes requiring autonomous radio sequencing, wakeup capability via LPAWUR, secure boot with AES-128, and integrated analog peripherals including 12-bit ADC, LCD driver, and LC sensor controller.
Technical Context
The STM32WL33KBV7TR implements a tightly coupled dual-domain architecture: the Cortex-M0+ core manages application logic and protocol stacks while the hardware-configurable radio subsystem handles autonomous operations-including Sniff mode, frequency hopping, and Listen-before-Talk-via a dedicated sequencer. Its RF front-end uses low-IF RX and direct modulation TX with programmable gain control and I/Q data access.
Power management integrates an SMPS step-down converter (1.2–2.4 V output, 4–8 MHz clock) with bypass-on-the-fly (static/dynamic) modes to optimize RF sensitivity during reception; Deepstop mode draws only 960 nA, and the LPAWUR consumes 4 µA in always-on autonomous wake-up mode with -54 dBm OOK sensitivity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | Arm Cortex-M0+, 32-bit, up to 64 MHz - enables real-time protocol stack execution and deterministic interrupt response in LPWAN edge nodes. |
| Memory | 256 KB flash / 32 KB SRAM (full retention) / 1 KB OTP - supports dual-role firmware (application + radio stack) and secure key storage without external memory. |
| RF Bands | 159–185 MHz, 413–479 MHz, 826–958 MHz - covers global ISM/SRD bands including 433 MHz (EU), 868 MHz (EU), and 915 MHz (US/Japan) for worldwide certification. |
| TX Power | Programmable up to +20 dBm (TX+TXHP mode) - achieves >10 km range in open-field LoRa-like deployments with optimized antenna matching. |
| RX Sensitivity | -132 dBm @ 300 bit/s (433 MHz OOK), -128 dBm @ 300 bit/s (868 MHz 2(G)FSK) - enables reliable reception under weak-signal industrial conditions with minimal packet loss. |
| Low-Power Modes | 960 nA Deepstop, 4 µA LPAWUR active - extends 10-year battery life in metering and asset tracking applications using scheduled wake-up events. |
| Analog Peripherals | 12-bit ADC (1 MSPS, 8 SE/4 diff channels), LC sensor controller, 6-bit DAC - supports direct interfacing with flow meters, temperature sensors, and battery monitoring without external signal conditioning. |
Pinout & Package
VFQFPN48 (6 × 6 mm, 0.4 mm pitch) package with 32 GPIOs, all supporting retention in low-power modes. Pin functions include dual radio control signals (TX_SEQUENCE on PA10/PB14, RX_SEQUENCE on PA8/PA11), RF I/O (RFIO_1P/RFIO_1N, RFIO_2P/RFIO_2N), SMPS control (VFBSD, VLXSD), and wakeup-capable LPUART/USART.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PA10 / PB14 | TX_SEQUENCE (AF2) | Asserts high during RF transmission - used to trigger external antenna switch or synchronize coexisting radios (e.g., BLE/Wi-Fi). |
| PA8 / PA11 | RX_SEQUENCE (AF2) | Asserts high during RF reception - enables precise timing of analog front-end activation or power-gating of companion ICs. |
| RFIO_1P / RFIO_1N | Differential RF output (low-band) | Drives 50 Ω antenna matching network for 159–185 MHz / 413–479 MHz bands; requires external balun for single-ended operation. |
| RFIO_2P / RFIO_2N | Differential RF output (high-band) | Drives 50 Ω antenna matching network for 826–958 MHz band; supports +20 dBm output with external PA bias control. |
| VFBSD | SMPS feedback voltage node | Connects to external LC filter; output voltage programmable from 1.2–2.4 V - critical for optimizing RF supply noise and current efficiency. |
| LPAWUR_IN | Wake-up radio analog input | Accepts OOK-modulated RF signal directly from antenna; internal AGC maintains dynamic range across -54 dBm sensitivity threshold. |
Key Features
| Feature | Design Value |
|---|---|
| Fully autonomous radio sequencer | Hardware-based state machine enabling Sniff mode, frequency hopping, and LBT without CPU intervention - reduces active time by >90% in periodic sensing. |
| Low-power autonomous wake-up receiver (LPAWUR) | 4 µA always-on OOK receiver with -54 dBm sensitivity and Manchester-decoded frame detection - wakes full SoC from Deepstop in <100 µs. |
| Integrated SMPS with bypass-on-the-fly | Configurable 1.2–2.4 V output with static/dynamic bypass modes - improves RX sensitivity by 3–5 dB when disabling switching noise during reception. |
| Multi-protocol RF support | Native compatibility with W-MBUS, Sigfox, MiWi, KNX-RF, IEEE 802.15.4g - eliminates need for external protocol accelerators in smart utility deployments. |
| Secure boot with AES-128 & TRNG | SWD disable, write/read-out protection, and hardware crypto acceleration - meets IEC 62443-3-3 SL2 requirements for firmware integrity in industrial IoT. |
Applications
| Asset Tracking | Wireless Sensors |
|---|---|
Use Scenario: Real-time location and condition monitoring of shipping containers across multi-modal transport corridors. IC Role / Device Role / Timing Role: Sub-1 GHz SoC handling GPS/GNSS data acquisition, encrypted payload assembly, and adaptive TX power control based on link budget estimation. Use Value: 10+ year battery life achieved via Deepstop sleep between transmissions and LPAWUR-triggered wake-up on geofence breach alerts. | Use Scenario: Battery-powered environmental sensors deployed in HVAC ducts measuring temperature, humidity, and CO₂ levels. IC Role / Device Role / Timing Role: Integrated 12-bit ADC and LC sensor controller directly digitize analog sensor outputs; radio transmits compressed readings every 15 minutes using 868 MHz 2(G)FSK. Use Value: Eliminates external signal chain components, reducing BOM cost by $0.85/unit and PCB area by 22 mm². |
| Industrial Monitoring | Smart Home Alarms |
Use Scenario: Predictive maintenance node on rotating machinery detecting vibration anomalies via piezoelectric sensor interface. IC Role / Device Role / Timing Role: High-speed ADC sampling at 1 MSPS captures transient spikes; Cortex-M0+ runs FFT-based spectral analysis before transmitting event-triggered packets. Use Value: On-device processing avoids cloud latency; RF robustness against EMI ensures >99.9% packet delivery in electrically noisy factory environments. | Use Scenario: Wireless door/window contact sensor with tamper detection and battery level reporting in residential security systems. IC Role / Device Role / Timing Role: LPAWUR monitors for magnetic reed switch closure while main SoC remains in Deepstop; full wake-up occurs only on valid event frame. Use Value: 7-year battery life confirmed per EN 50131-1; certified ETSI EN 300 220 compliance ensures interference-free operation alongside Wi-Fi/BLE gateways. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar sub-GHz wireless MCU applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SX1262 + STM32L4 | Discrete RF transceiver + separate ultra-low-power MCU - no integrated radio sequencer or LPAWUR; requires external crystal and matching network. | Higher design complexity for protocol stack integration; lacks hardware autonomous radio modes and wakeup receiver. | Select when needing higher RF flexibility (e.g., custom PHY) or migration path from legacy SX127x designs. |
| CC1352P7 | Arm Cortex-M4F + dual-band (sub-1 GHz + 2.4 GHz) radio; 352 KB flash but no integrated SMPS or LPAWUR; RX sensitivity -124 dBm @ 50 kbps (868 MHz). | Better for multi-protocol gateways; less optimal for pure sub-GHz battery nodes due to higher Deepstop current (1.1 µA vs. 960 nA). | Select when 2.4 GHz BLE coexistence or higher compute throughput (DSP instructions) is required. |
Compared with SX1262+STM32L4 and CC1352P7, the STM32WL33KBV7TR provides tighter integration (single-die RF+MCU), lower system-level power (960 nA Deepstop + 4 µA LPAWUR), and certified autonomous radio operation - reducing firmware development effort and improving long-term field reliability in certified LPWAN deployments.
Availability
STM32WL33KBV7TR is available at Aetrix Electronics and suitable for asset tracking, wireless sensors, and industrial monitoring requiring stable component supply, long-term lifecycle assurance, and global regulatory compliance (ETSI EN 300 220, FCC Part 15/90, ARIB STD-T67/T108).
Supply support for STM32WL33KBV7TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering silicon solutions for automotive, industrial, and IoT markets with emphasis on energy efficiency and functional safety.
The STM32WL33xx product line targets certified, battery-operated LPWAN endpoints - combining sub-GHz RF, ultra-low-power MCU, and security features to simplify development of ETSI/FCC-compliant wireless sensor networks without external RF components.
FAQ
What is the maximum certified TX power and corresponding frequency band for STM32WL33KBV7TR?
The STM32WL33KBV7TR supports up to +20 dBm output power in the 826–958 MHz band using TX+TXHP mode, validated per ETSI EN 300 220 Category 1 and FCC Part 15.247. This configuration requires external matching network tuning and thermal derating above +17 dBm in continuous operation.
Does STM32WL33KBV7TR support over-the-air (OTA) firmware updates via its integrated radio?
Yes - the device supports secure OTA updates using its embedded bootloader with configurable read/write protection and AES-128 decryption. Firmware images are received via 2(G)FSK or OOK, validated with CRC-16 and stored in protected flash sectors before atomic swap and reset.
How does the LPAWUR interface with the main MCU domain during wake-up events?
The LPAWUR asserts a dedicated wakeup interrupt (WUF) signal to the NVIC upon valid Manchester-encoded frame detection. The Cortex-M0+ exits Deepstop mode within 100 µs, restores clocks and SRAM, and executes the configured ISR - all without external components or crystal startup delay.
Can the SMPS be disabled to use an external 1.2 V supply while retaining full RF performance?
Yes - the SMPS can be disabled via configuration bits, allowing VFBSD to be tied to an external 1.2 V LDO. RF performance remains identical provided the external supply meets ripple (<10 mVpp) and transient response (<10 µs settling) specs defined in DS14221 Section 6.3.2.
STM32WL33KBV7TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Type:
- TxRx + MCU
- RF Family/Standard:
- 802.15.4
- Protocol:
- KNX, LPWAN, Sigfox, Zigbee®
- Modulation:
- 2-FSK, 2-GFSK, 4-FSK, 4-GFSK, ASK, DBPSK, DSSS, OOK
- Frequency:
- 413MHz ~ 479MHz, 826MHz ~ 958MHz
- Data Rate (Max):
- 600kbps
- Power - Output:
- 20dBm
- Sensitivity:
- -132dBm
- Memory Size:
- 256kB Flash, 32kB SRAM
- Serial Interfaces:
- GPIO, I2C, I2S, IrDA, JTAG, PCM, PWM, SPI, UART, USART
- GPIO:
- 32
- Voltage - Supply:
- 1.7V ~ 3.6V
- Current - Receiving:
- 4mA
- Current - Transmitting:
- 10mA ~ 80mA
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 32-VFQFPN (5x5)
STM32WL33KBV7TR FAQ
1.How can I place an order for STM32WL33KBV7TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32WL33KBV7TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32WL33KBV7TR reliable?
The price and inventory of STM32WL33KBV7TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32WL33KBV7TR is usually 5 days.
3.What payment methods are accepted for STM32WL33KBV7TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32WL33KBV7TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32WL33KBV7TR?
STM32WL33KBV7TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32WL33KBV7TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32WL33KBV7TR?
For technical support, including STM32WL33KBV7TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32WL33KBV7TR requirements.
6.How does Aetrix verify that STM32WL33KBV7TR is sourced from the original manufacturer or authorized distributors?
All STM32WL33KBV7TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32WL33KBV7TR meets industry standards.
7.What is the process for return or replacement of STM32WL33KBV7TR?
All STM32WL33KBV7TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32WL33KBV7TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32WL33KBV7TR part is unused and in its original packaging.
Return procedure for STM32WL33KBV7TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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