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STMicroelectronics STM32WL55JCI6TR
- Part No.:
- STM32WL55JCI6TR
- Manufacturer:
- STMicroelectronics
- Category:
- RF Transceiver ICs
- Package:
- 73-UFBGA
- Datasheet:
-
STM32WL55JCI6TR.pdf
- Description:
- IC RF TXRX+MCU ISM<1GHZ 73UFBGA
- Quantity:
- Payment:
- Shipping:
Inventory:2,671
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Product details
Overview
STM32WL55JCI6TR from STMicroelectronics is a dual-core 32-bit Arm® Cortex®-M4/M0+ SoC integrating sub-GHz radio (LoRa®, (G)FSK, (G)MSK, BPSK), 256 KB flash, 64 KB SRAM, hardware AES-256 and PKA, operating from 1.8–3.6 V with shutdown current of 31 nA. It targets LPWAN end-nodes in smart metering, asset tracking, and industrial sensor networks requiring secure over-the-air firmware updates and ultra-low-power operation.
For engineers reviewing the STM32WL55JCI6TR datasheet, STM32WL55JCI6TR pinout, STM32WL55JCI6TR application, or STM32WL55JCI6TR equivalent, key selection criteria include dual-core real-time partitioning, certified RF compliance (ETSI EN 300 220, FCC Part 15), integrated SMPS, and hardware-accelerated cryptographic services for LoRaWAN® Class C and secure firmware install (SFI).
Technical Context
The device implements tightly coupled dual-CPU architecture: Cortex-M4 (up to 48 MHz, ART Accelerator, DSP/MPU) handles application and protocol stack, while Cortex-M0+ (up to 48 MHz, MPU) manages radio control and low-power scheduling. Inter-processor communication uses IPCC mailboxes and HSEM semaphores.
Sub-GHz radio features programmable TX output up to +22 dBm, RX sensitivity of –148 dBm (LoRa®, SF12, 10.4 kHz), and supports ETSI/FCC/Japanese regulatory compliance via integrated RF-PLL and configurable IF stages. Radio and MCU share clock domains synchronized by RCC with TCXO support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: Arm Cortex-M4 @ 48 MHz (DSP/MPU/ART) + Cortex-M0+ @ 48 MHz (radio control) |
| RF Frequency Range | 150–960 MHz - enables global LPWAN deployment across 433/470/868/915 MHz ISM bands |
| RX Sensitivity | –148 dBm (LoRa®, SF12, 10.4 kHz) - extends link budget for long-range, battery-operated sensors |
| TX Output Power | Programmable up to +22 dBm (high-power) or +15 dBm (low-power) - balances range vs. power consumption |
| Ultra-Low-Power Modes | Shutdown: 31 nA; Standby+RTC: 360 nA; Stop2+RTC: 1.07 µA - enables >10-year battery life in metering |
| Security Features | AES-256 hardware accelerator, PKA, RNG, PCROP/WRP memory protection, secure bootloader - meets LoRaWAN® root-of-trust requirements |
| Memory | 256 KB flash (sector-protected), 64 KB SRAM, 20×32-bit backup registers - supports OTA firmware update and RTC-persistent state |
| Power Management | Integrated SMPS step-down converter + smart SMPS-to-LDO switch - improves efficiency across load conditions |
Pinout & Package
STM32WL55JCI6TR is housed in a 48-pin UFQFPN package (7 × 7 mm, 0.5 mm pitch), RoHS-compliant and ECOPACK2 qualified. Pin functions are validated per STMicroelectronics datasheet DS13293 Rev 5, Section 4.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD | Main power supply (1.8–3.6 V) | Supplies both MCU and RF subsystems; decoupling required per layout guidelines |
| VDDRF | RF power supply (1.8–3.6 V) | Independent rail for analog RF block; enables noise isolation from digital switching |
| ANT | RF antenna interface | Differential RF output (PA+ and PA−); requires external matching network or IPD integration |
| OSC_IN / OSC_OUT | 32 MHz crystal oscillator connection | Primary high-speed clock source for CPU and radio timing; supports TCXO for frequency stability |
| RTC_IN / RTC_OUT | 32 kHz RTC oscillator connection | Enables calendar timekeeping and wake-up during Stop2 mode with 360 nA standby current |
| BOOT0 | Boot mode selection | Pulled low for main flash boot; used with NRST for system memory bootloader entry |
| NRST | Active-low reset input | Asynchronous reset for full system initialization; compatible with push-button and supervisory ICs |
| SWDIO / SWCLK | Serial Wire Debug interface | Two-pin debug port supporting full core visibility, breakpoints, and flash programming |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core asymmetric processing | M4 runs application stack and crypto; M0+ handles radio MAC layer and low-power scheduling - eliminates RTOS overhead for time-critical RF events |
| Hardware-accelerated security | AES-256 + PKA + RNG + GTZC memory firewall - enables FIPS-compliant key generation and secure firmware install (SFI) without software bottlenecks |
| Regulatory-certified RF subsystem | Pre-verified compliance with ETSI EN 300 220, FCC Part 15/24/90, ARIB STD-T30/T-67 - reduces certification cost and timeline for end equipment |
| Integrated power management | Embedded SMPS + LDO switch + 5-level BOR - delivers >85% conversion efficiency and robust brownout immunity across temperature (-40°C to +105°C) |
| OTA-ready architecture | Bootloader supporting USART/SPI + dual-bank flash + CRC unit - enables atomic, fail-safe firmware updates over LoRaWAN® or proprietary protocols |
| Ultra-low-power analog peripherals | 12-bit ADC @ 2.5 Msps (16-bit oversampled), 12-bit DAC, 2× comparators - supports sensor fusion and local decision-making without waking CPU |
Applications
| Smart Utility Metering | Industrial Asset Tracking |
|---|---|
|
Use Scenario: Battery-powered gas/water/electricity meters transmitting hourly consumption data over 5–15 km rural coverage. IC Role / Device Role / Timing Role: Dual-core SoC executing LoRaWAN® Class C stack (M4) while M0+ manages precise TX timing, channel hopping, and adaptive data rate (ADR) under radio scheduler. Use Value: 31 nA shutdown and 1.07 µA Stop2+RTC enable >15-year battery life; integrated SMPS extends runtime at low VDD. |
Use Scenario: GPS-enabled trackers on shipping containers reporting location every 6 hours via private LoRa network across port logistics zones. IC Role / Device Role / Timing Role: Secure sub-GHz MAC layer enforces message integrity; PKA signs location payloads; RTC triggers periodic wake-up and GPS acquisition. Use Value: Hardware AES-256 and secure bootloader prevent firmware tampering; -40°C to +105°C rating ensures reliability in outdoor enclosures. |
| Environmental Sensor Networks | Smart Agriculture Monitoring |
|
Use Scenario: Soil moisture, temperature, and CO₂ sensors deployed in remote fields, transmitting aggregated data daily using adaptive spreading factor. IC Role / Device Role / Timing Role: M0+ executes lightweight MAC and listens for downlink commands; M4 processes oversampled ADC data and applies digital filtering before transmission. Use Value: –148 dBm LoRa® sensitivity enables reception at extreme distances; 12-bit ADC with hardware oversampling achieves 16-bit effective resolution for precision analog sensing. |
Use Scenario: Solar-powered irrigation controllers receiving weather forecasts and soil data to schedule valve actuation via LoRa mesh. IC Role / Device Role / Timing Role: Integrated LPUART interfaces with external environmental sensors; dual DMA channels concurrently stream ADC and radio data without CPU intervention. Use Value: 43 GPIOs (most 5 V-tolerant) simplify connection to legacy sensors and actuators; UFBGA73-compatible footprint allows compact PCB design. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core LPWAN SoC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STM32WL54JCI6TR | Same die, reduced flash (128 KB) and RAM (48 KB); identical RF and security blocks | Suitable for simpler LoRaWAN® Class A nodes with smaller firmware footprints | Select when application code size < 100 KB and no OTA rollback requirement exists |
| STM32WLE5JC | Single-core Cortex-M4 only; same RF, security, and power specs; no M0+ radio controller | Requires software-managed radio timing; higher CPU load for MAC layer execution | Choose when deterministic dual-core partitioning is unnecessary and BOM cost reduction is prioritized |
Compared with STM32WL55JCI6TR, the WL54 variant trades memory capacity for cost in resource-constrained nodes, while the WLE5 removes hardware-enforced radio/MCU separation-increasing software complexity but reducing silicon area and unit price.
Availability
STM32WL55JCI6TR is available at Aetrix Electronics and suitable for smart metering, industrial telemetry, environmental monitoring, and agricultural IoT systems requiring stable component supply, long-term lifecycle assurance, and regulatory-compliant RF performance.
Supply support for STM32WL55JCI6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and automotive-grade components.
The STM32WL series is ST's purpose-built LPWAN SoC product line targeting secure, ultra-low-power sub-GHz wireless applications with integrated dual-core processing and certified radio compliance.
FAQ
What is the maximum certified RF output power for STM32WL55JCI6TR?
The device supports programmable high-power TX up to +22 dBm at 915 MHz (with external IPD), verified per FCC Part 15.247 and ETSI EN 300 220. This value is achievable using the integrated PA with proper matching network and thermal derating per DS13293 Section 5.3.30.
Does STM32WL55JCI6TR support LoRaWAN® Class C operation out of the box?
Yes - the dual-core architecture and hardware timers enable continuous RX window maintenance required for Class C. ST provides certified LoRaWAN® stack (STM32CubeWL) with pre-integrated MAC layer, and the M0+ core handles radio scheduling independently of the M4 application thread.
How is secure firmware update implemented on this device?
Secure Firmware Update (SFU) leverages hardware AES-256, PKA, and GTZC memory protection. Encrypted OTA images are authenticated and decrypted in trusted execution environment (TEE), then written to dual-bank flash with atomic swap. The process is defined in ST's AN5348 and enabled via SFI middleware.
What package variants are offered for STM32WL55JCI6TR?
STM32WL55JCI6TR is specifically the UFQFPN48 (7 × 7 mm) variant. The 'J' in the part number denotes this package; alternative UFBGA73 (5 × 5 mm) variants use suffix 'K' (e.g., STM32WL55JCI6TR is not UFBGA - that would be STM32WL55KCI6TR).
STM32WL55JCI6TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- STM32WL
- Package/Case:
- 73-UFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Type:
- TxRx + MCU
- RF Family/Standard:
- General ISM < 1GHz
- Protocol:
- LoRaWAN 1.0, Sigfox
- Modulation:
- BPSK, FSK, GFSK, GMSK, MSK
- Frequency:
- 915MHz
- Data Rate (Max):
- 300kbps
- Power - Output:
- 22dBm
- Sensitivity:
- -148dBm
- Memory Size:
- 256kB Flash, 64kB SRAM
- Serial Interfaces:
- ADC, GPIO, I2C, I2S, SPI, IrDA, UART, USART
- GPIO:
- 43
- Voltage - Supply:
- 1.8V ~ 3.6V
- Current - Receiving:
- 4.82mA
- Current - Transmitting:
- 15mA ~ 120mA
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 73-UFBGA (5x5)
STM32WL55JCI6TR FAQ
1.How can I place an order for STM32WL55JCI6TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32WL55JCI6TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32WL55JCI6TR reliable?
The price and inventory of STM32WL55JCI6TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32WL55JCI6TR is usually 5 days.
3.What payment methods are accepted for STM32WL55JCI6TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32WL55JCI6TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32WL55JCI6TR?
STM32WL55JCI6TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32WL55JCI6TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32WL55JCI6TR?
For technical support, including STM32WL55JCI6TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32WL55JCI6TR requirements.
6.How does Aetrix verify that STM32WL55JCI6TR is sourced from the original manufacturer or authorized distributors?
All STM32WL55JCI6TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32WL55JCI6TR meets industry standards.
7.What is the process for return or replacement of STM32WL55JCI6TR?
All STM32WL55JCI6TR units undergo pre-shipment inspection (PSI). If there is an issue with STM32WL55JCI6TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32WL55JCI6TR part is unused and in its original packaging.
Return procedure for STM32WL55JCI6TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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