STMicroelectronics STM32WLE4JBI6
- Part No.:
- STM32WLE4JBI6
- Manufacturer:
- STMicroelectronics
- Category:
- RF Transceiver ICs
- Package:
- 73-UFBGA
- Datasheet:
-
STM32WLE4JBI6.pdf
- Description:
- IC RF TXRX+MCU ISM<1GHZ 73UFBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
STM32WLE4JBI6 from STMicroelectronics is a multiprotocol LPWAN 32-bit Arm® Cortex®-M4 microcontroller integrating sub-GHz radio (LoRa®, (G)FSK, (G)MSK, BPSK), 256 KB flash, 64 KB SRAM, and hardware AES-256 encryption. It operates from 150–960 MHz, achieves –148 dBm LoRa® RX sensitivity (SF12, 10.4 kHz), supports +22 dBm TX output, and delivers ultra-low-power operation down to 31 nA in shutdown mode. It targets battery-powered IoT end-nodes in smart metering, asset tracking, and environmental monitoring.
For engineers reviewing the STM32WLE4JBI6 datasheet, STM32WLE4JBI6 pinout, STM32WLE4JBI6 application, or STM32WLE4JBI6 equivalent, this page provides verified technical context, validated low-power radio specifications, confirmed pin mapping for UFBGA73, real-world LPWAN protocol compatibility (LoRaWAN®, Sigfox™, W-MBus), and design-meaningful feature analysis - all derived from ST's DS13105 Rev 12 production datasheet.
Technical Context
The STM32WLE4JBI6 integrates a dual-domain architecture: an Arm Cortex-M4 core running at up to 48 MHz with ART Accelerator for zero-wait-state flash execution, and a fully autonomous sub-GHz radio transceiver supporting LoRa®, FSK, MSK, and BPSK modulation schemes. Its RF front-end includes programmable TX power (up to +22 dBm high-power / +15 dBm low-power modes) and compliance with ETSI EN 300 220, FCC Part 15/24/90, and ARIB STD-T30/T-67/T-108.
Power management combines an embedded SMPS step-down converter, smart SMPS-to-LDO switching, five selectable BOR thresholds, and seven low-power modes - including Stop2 (+RTC) at 1.07 µA and Standby (+RTC) at 360 nA - enabling multi-year battery life in constrained deployments. The device supports OTA firmware updates and features hardware PKA, RNG, and PCROP-based memory protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core | Arm Cortex-M4 @ 48 MHz with DSP/MPU instructions and ART Accelerator for deterministic flash execution |
| Radio Frequency Range | 150–960 MHz - enables global LPWAN deployment across EU 868 MHz, US 915 MHz, and CN 470 MHz bands |
| LoRa® RX Sensitivity | –148 dBm at SF12/10.4 kHz - maximizes link budget for long-range, low-data-rate sensor networks |
| TX Output Power | Programmable up to +22 dBm (high-power path) or +15 dBm (low-power path) - balances range vs. power consumption |
| Ultra-Low-Power Modes | Shutdown: 31 nA; Standby+RTC: 360 nA; Stop2+RTC: 1.07 µA - enables >10-year coin-cell operation in wake-on-radio use cases |
| Memory | 256 KB flash (with sector protection/PCROP) and 64 KB SRAM - supports secure OTA updates and local data buffering |
| Security | AES-256 hardware accelerator, true RNG, PKA, 96-bit die ID, and 64-bit IEEE-compliant UID - meets IEC 62443-3-3 SL2 requirements |
Pinout & Package
STM32WLE4JBI6 is housed in a 73-ball UFBGA package (5 × 5 mm, 0.4 mm pitch), optimized for compact LPWAN modules and PCB space-constrained designs. The package supports industrial temperature range (–40 °C to +105 °C) and complies with ECOPACK2 environmental standards.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_RF / VDD_PA | RF power supply pins | Dedicated 1.8–3.6 V supplies for RF transceiver and power amplifier - enable independent voltage scaling and noise isolation |
| ANT | RF antenna interface | Differential RF output requiring external matching network or IPD companion chip (e.g., ST's ESDALC6-1BM2 - 22 dBm @ 915 MHz) |
| OSC_IN / OSC_OUT | 32 MHz crystal oscillator terminals | Supports high-accuracy timing for LoRa® symbol synchronization and precise frequency planning |
| VBAT | Backup power supply | Enables RTC and 20×32-bit backup registers during main power loss - critical for time-stamped event logging |
| NRST | Active-low reset input | Asynchronous reset with internal pull-up; compatible with external reset supervisors and brownout detection circuits |
| PAx / PBx / PCx | General-purpose I/Os | Up to 43 GPIOs (most 5 V-tolerant); support multiple alternate functions including LPUART, SPI, I²C, and timer channels |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Sub-GHz Radio | Fully autonomous transceiver supporting LoRa®, (G)FSK, (G)MSK, BPSK - eliminates need for external RF IC and reduces BOM count by ≥3 components |
| Hardware Security Engine | AES-256 + PKA + RNG + UID - enables secure key generation, encrypted firmware storage, and attestation without software overhead |
| Adaptive Real-Time Accelerator (ART) | Zero-wait-state execution from flash at 48 MHz - removes cache misses in interrupt-driven LPWAN protocols and improves real-time determinism |
| SMPS + Smart LDO Switch | Embedded step-down converter with automatic fallback to LDO - maintains efficiency across load transients while ensuring clean RF supply stability |
| OTA Firmware Update Support | Bootloader with USART/SPI interfaces and dual-bank flash layout - allows field updates without external programmer or physical access |
Applications
| Smart Utility Metering | Industrial Asset Tracking |
|---|---|
|
Use Scenario: Battery-powered water/gas/electricity meters transmitting hourly consumption data over 5–15 km rural coverage. IC Role / Device Role / Timing Role: System-on-chip controller and LoRa® transceiver - handles sensor acquisition, AES-encrypted payload assembly, and adaptive TX power control based on RSSI feedback. Use Value: –148 dBm LoRa® sensitivity and +22 dBm TX extend range beyond legacy FSK solutions; 31 nA shutdown current enables >15-year battery life. |
Use Scenario: GPS-less location tracking of shipping containers using multihop mesh or geofence-triggered uplink via private LoRaWAN gateway. IC Role / Device Role / Timing Role: Autonomous edge node with RTC wakeup, accelerometer interface, and burst-mode LoRa® transmission - manages duty-cycled sensing and synchronized channel hopping. Use Value: Stop2 mode (1.07 µA) minimizes idle current between motion events; hardware PKA accelerates ECC-based join-request signing for secure onboarding. |
| Environmental Sensor Network | Smart Agriculture Monitoring |
|
Use Scenario: Soil moisture, temperature, and ambient light nodes deployed in remote fields, reporting daily via LoRaWAN Class C. IC Role / Device Role / Timing Role: Low-power MCU + integrated radio - executes sensor polling, oversampled ADC conversion (12-bit → 16-bit effective), and adaptive spreading factor selection. Use Value: 12-bit ADC with hardware oversampling (up to 16-bit resolution) improves measurement fidelity without external sigma-delta converters; TCXO support ensures ±0.5 ppm timing accuracy for Class C receive windows. |
Use Scenario: Solar-powered irrigation controllers receiving weather forecasts and soil data, then actuating valves via LoRa®-based command downlink. IC Role / Device Role / Timing Role: Dual-role device - acts as LoRa® end-node (RX/TX) and local decision engine using onboard 64 KB SRAM for predictive watering logic. Use Value: LPUART and I²C peripherals interface directly to solar charge controller and solenoid drivers; VBAT mode preserves RTC and configuration during solar panel shading events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar LPWAN microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SX1262 + STM32L4xx | Discrete RF IC + separate ultra-low-power MCU - requires external matching, more PCB area, and complex RF layout | Lacks integrated security engine and single-chip LoRaWAN stack support; demands additional firmware integration effort | Choose when existing design uses Semtech radios or requires custom RF front-end tuning not supported by STM32WL's IPD ecosystem |
| STM32WLE5JBI6 | Pin-compatible upgrade with 256 KB flash (vs. 256 KB), identical radio/peripherals, but adds dual-bank flash for seamless OTA and enhanced RDP level 2 protection | Better suited for certified deployments requiring fail-safe firmware rollback and higher security assurance (e.g., utility-grade meters) | Prefer for new designs where future-proofing, regulatory certification, and robust OTA are mandatory - same footprint, no redesign needed |
Compared with SX1262+STM32L4xx, STM32WLE4JBI6 reduces system complexity and validation scope by integrating radio and MCU; compared with STM32WLE5JBI6, it trades dual-bank flash and RDP level 2 for cost-sensitive volume deployments where single-bank OTA suffices.
Availability
STM32WLE4JBI6 is available at Aetrix Electronics and suitable for smart metering, industrial asset tracking, environmental sensor networks, and smart agriculture requiring stable component supply across multi-year product lifecycles.
Supply support for STM32WLE4JBI6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, power devices, and sensors for industrial, automotive, and IoT markets.
The STM32WLE4xx series belongs to ST's LPWAN-optimized STM32WL family, engineered specifically for single-chip, secure, ultra-low-power sub-GHz wireless connectivity in battery-operated IoT endpoints - eliminating RF subsystem integration risk.
FAQ
What radio protocols does the STM32WLE4JBI6 natively support?
The STM32WLE4JBI6 supports LoRa®, (G)FSK, (G)MSK, and BPSK modulation schemes in hardware, enabling implementation of LoRaWAN®, Sigfox™, W-MBus, and proprietary protocols. Its open radio architecture allows full register-level control - no vendor lock-in - and ST provides certified LoRaWAN® and W-MBus stacks in STM32CubeWL.
Does STM32WLE4JBI6 require external RF components for antenna connection?
Yes - the ANT pin is a differential RF output requiring either an external discrete matching network or ST's integrated passive device (IPD) companions (e.g., ESDALC6-1BM2 for 915 MHz). The IPDs integrate balun, filter, and ESD protection in one 1.6 × 1.6 mm package, reducing layout complexity and improving yield in mass production.
How does the STM32WLE4JBI6 achieve its 31 nA shutdown current?
Shutdown mode disables all clocks, regulators (except VBAT domain), and internal circuitry except the reset block and VBAT-powered RTC/backup registers. This state is entered via PWR_CR4.UPDS bit and requires no external components - verified per DS13105 Rev 12 Table 49 at VDD = 3 V and Tj = 25 °C.
Is the STM32WLE4JBI6 pin-compatible with other STM32WL variants?
Yes - STM32WLE4JBI6 (UFBGA73) shares identical pinout and footprint with STM32WLE5JBI6 and STM32WLE4JBQ6 (UFQFPN48 is incompatible). This enables direct drop-in replacement for cost optimization or security upgrades without PCB revision, provided flash/RAM usage fits the target variant.
STM32WLE4JBI6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 73-UFBGA
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- -
- Type:
- TxRx + MCU
- RF Family/Standard:
- General ISM < 1GHz
- Protocol:
- LoRaWAN 1.0, Sigfox, Wireless M-Bus
- Modulation:
- BPSK, FSK, GFSK, GMSK, MSK
- Frequency:
- 150MHz ~ 960MHz
- Data Rate (Max):
- 300kbps
- Power - Output:
- 22dBm
- Sensitivity:
- -148dBm
- Memory Size:
- 128kB Flash
- Serial Interfaces:
- ADC, GPIO, I2C, I2S, IrDA, JTAG, PWM, SPI, UART, USART
- GPIO:
- 43
- Voltage - Supply:
- 1.8V ~ 3.6V
- Current - Receiving:
- 4.47mA ~ 10.22mA
- Current - Transmitting:
- 21mA ~ 120mA
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Supplier Device Package:
- 73-UFBGA (5x5)
STM32WLE4JBI6 FAQ
1.How can I place an order for STM32WLE4JBI6 through Aetrix?
Please submit a Request for Quotation (RFQ) for STM32WLE4JBI6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM32WLE4JBI6 reliable?
The price and inventory of STM32WLE4JBI6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM32WLE4JBI6 is usually 5 days.
3.What payment methods are accepted for STM32WLE4JBI6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM32WLE4JBI6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM32WLE4JBI6?
STM32WLE4JBI6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM32WLE4JBI6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM32WLE4JBI6?
For technical support, including STM32WLE4JBI6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM32WLE4JBI6 requirements.
6.How does Aetrix verify that STM32WLE4JBI6 is sourced from the original manufacturer or authorized distributors?
All STM32WLE4JBI6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM32WLE4JBI6 meets industry standards.
7.What is the process for return or replacement of STM32WLE4JBI6?
All STM32WLE4JBI6 units undergo pre-shipment inspection (PSI). If there is an issue with STM32WLE4JBI6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM32WLE4JBI6 part is unused and in its original packaging.
Return procedure for STM32WLE4JBI6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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