STMicroelectronics STM6505SCABDG6F

Overview

STM6505SCABDG6F from STMicroelectronics is a dual push-button Smart Reset IC with user-adjustable setup delay, battery voltage monitoring (VBAT), and independent battery low detect (BLD) output. It features factory-programmable VCC reset thresholds (1.575–4.625 V), adjustable tSRC delay via external capacitor (2–15 s range), and operates from 1.0 V to 5.5 V supply. Used in portable electronics requiring robust, delayed-reset response and battery health indication.

For engineers reviewing the STM6505SCABDG6F datasheet, STM6505SCABDG6F pinout, STM6505SCABDG6F application, or STM6505SCABDG6F equivalent, this device supports dual active-low Smart Reset inputs (SR0/SR1), open-drain RST and BLD outputs, VBAT threshold monitoring at 1.25 V (fixed), and TDFN8 package integration for space-constrained mobile designs.

Technical Context

The STM6505 implements dual combined Smart Reset logic: both SR0 and SR1 must be held low longer than tSRC (programmed by external capacitor on SRC pin) to assert RST. Its internal comparator monitors VCC against factory-set thresholds and asserts RST if VCC falls below VRST, with tREC timeout after recovery.

VBAT input feeds a dedicated comparator with fixed 1.25 V threshold and 8 mV typical hysteresis; when VBAT drops below threshold (set via external resistor divider), BLD goes active-low. The device draws ≤2.5 µA at 25 °C and supports industrial temperature range (–40 °C to +85 °C).

Key Specifications

Pinout & Package

TDFN8 package (2 mm × 2 mm, 0.5 mm pitch, 0.75 mm height) with exposed thermal pad (not electrically connected); RoHS compliant and halogen-free.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual Smart Reset with battery monitoring applications.

Compared with STM6505SCABDG6F, STM6504SCABDG6F trades battery monitoring for instant reset flexibility, while MAX6369KA26+T reduces feature count to lower BOM cost but omits both dual-input logic and BLD - making STM6505 uniquely suited for integrated battery-aware portable reset control.

Availability

STM6505SCABDG6F is available at Aetrix Electronics and suitable for smartphone power management, e-book system reset control, portable navigation devices, and MP3 player stability requiring stable component supply across production lifecycles.

Supply support for STM6505SCABDG6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader specializing in microcontrollers, analog ICs, and power management solutions for automotive, industrial, and consumer markets.

The STM65xx Smart Reset family targets portable electronics requiring robust, user-tunable reset behavior and battery health awareness - designed specifically for mobile phones, e-books, and navigation devices demanding high reliability in compact form factors.

FAQ

What is the function of the SRC pin on STM6505SCABDG6F?

The SRC pin connects to an external capacitor that sets the Smart Reset setup delay (tSRC). With CSRC = 0.2 µF, tSRC is 2.5 s typical; with 1 µF, it rises to 12.5 s typical. Capacitor leakage and PCB layout directly impact timing accuracy, so low-leakage ceramic types placed close to SRC are mandatory.

How does the BLD output behave relative to VBAT voltage?

BLD is an active-low, open-drain output that asserts when the voltage at the VBAT pin falls below 1.25 V (fixed threshold). An external resistor divider scales the actual battery voltage to match this threshold; hysteresis of 8 mV typical prevents oscillation near trip point.

Can STM6505SCABDG6F operate with VCC below 1.575 V?

Yes - the IC functions down to 1.0 V, and RST output remains valid. However, VBAT monitoring requires VCC ≥1.575 V for proper comparator biasing; below that, BLD behavior is undefined and VCC threshold detection may be inaccurate.

What is the recommended decoupling for STM6505SCABDG6F?

A 0.1 µF ceramic capacitor must be placed between VCC and VSS, as close as possible to the pins. For TSR (not present on STM6505), a similar cap is advised - but STM6505 uses SRC instead, and no decoupling is specified for that pin beyond proper capacitor selection.