STMicroelectronics STM6524AUARDL6F

Overview

STM6524AUARDL6F from STMicroelectronics is a 6-pin Smart Reset™ supervisor IC designed for delayed, dual-button reset control in portable electronics. It features dual active-low Smart Reset™ inputs (SR0/SR1), factory-programmed 10 s typical tSRC delay, no fixed power-on reset, open-drain active-low RST output with no internal pull-up, and operates from 1.65 V to 5.5 V with only 1.5 µA supply current. It enables robust system recovery in handheld devices where accidental short presses must be ignored.

For engineers reviewing the STM6524AUARDL6F datasheet, STM6524AUARDL6F pinout, STM6524AUARDL6F application, or STM6524AUARDL6F equivalent, this device addresses precise push-button reset timing, glitch-immune dual-input coordination, undervoltage-aware reset deassertion down to 1.0 V, and UDFN6 footprint constraints in space-constrained designs.

Technical Context

The STM6524AUARDL6F implements a synchronous dual-input logic architecture: both SR0 and SR1 must be held low simultaneously for the full factory-set tSRC = 10 s (typ.) before asserting RST. Its test mode is triggered by overvoltage on SR0 (VCC + 0.9–1.4 V), initiating a shortened 21 ms tSRC-SHORT for rapid validation.

No power-on reset circuitry is integrated; reset assertion relies solely on sustained button press. The RST output remains asserted only while both SR inputs stay low - releasing either input immediately deasserts RST, confirming its push-button-controlled pulse width behavior per the "A" (no tREC) option in the part number.

Key Specifications

Pinout & Package

Supplied in UDFN6 package (1.6 mm × 1.3 mm × 0.55 mm, 0.40 mm pitch), thermally enhanced with exposed pad tied to VSS internally. RoHS-compliant ECOPACK®2 construction.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-input delayed reset applications.

Compared with STM6524AUARDL6F, the ALAR and APAR variants offer shorter factory-set tSRC delays (6 s and 7.5 s), enabling faster system recovery while retaining identical pinout, supply range, and open-drain RST behavior - ideal for tuning reset responsiveness without redesigning PCB layout or firmware.

Availability

STM6524AUARDL6F is available at Aetrix Electronics and suitable for mobile phones, e-readers, and portable navigation devices requiring stable component supply, long-term lifecycle support, and consistent UDFN6 packaging.

Supply support for STM6524AUARDL6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs for automotive, industrial, and consumer markets.

The STM65xx Smart Reset™ family targets portable electronics requiring robust, low-power, hardware-debounced reset control - specifically engineered to replace manual reset switches and reduce firmware complexity in battery-powered devices.

FAQ

Does STM6524AUARDL6F provide power-on reset functionality?

No. This device has no built-in power-on reset circuitry. Reset assertion depends exclusively on sustained low-level assertion of both SR0 and SR1 inputs for the full 10 s tSRC delay. System initialization must be handled externally or by the host MCU's internal POR.

What is the purpose of the NC pin (Pin 4), and how should it be handled?

Pin 4 is a no-connect terminal - not internally bonded. Per ST's layout guidance, it must be connected to VSS on the PCB to ensure mechanical stability and thermal performance of the UDFN6 package. Leaving it floating may compromise solder joint reliability.

Can the tSRC delay be adjusted after manufacturing?

No. The tSRC delay is factory-programmed to 10 s (typ.) and is not user-configurable. It cannot be modified via pins, registers, or external components. Selection among 0.5 s to 10 s steps is made at order time via the part number suffix (e.g., 'U' = 10 s).

Is an external pull-up resistor required on the RST output?

Yes. STM6524AUARDL6F uses an open-drain RST output with no internal pull-up ('A' option in part number). An external pull-up resistor to the target reset rail (e.g., 10 kΩ to VCC of the MCU) is mandatory to establish a valid high logic level when RST is inactive.