STMicroelectronics STM6600AS24DM6F

Overview

STM6600AS24DM6F from STMicroelectronics is a smart push-button on/off controller with Smart Reset™ and power-on lockout functionality. It monitors push-button state and supply voltage, asserts enable output (EN) to control external MOSFETs or DC-DC converters, features 1.5 V ±1% voltage reference, 0.6 µA standby current, and operates from 1.6 V to 5.5 V across –40 °C to +85 °C. Used in portable devices requiring secure, debounced power sequencing.

For engineers reviewing the STM6600AS24DM6F datasheet, STM6600AS24DM6F pinout, STM6600AS24DM6F application, or STM6600AS24DM6F equivalent, key selection criteria include adjustable Smart Reset™ delay via CSRD capacitor, PSHOLD confirmation timing for startup integrity, open-drain/interrupt outputs with ±15 kV air-discharge ESD rating, and factory-trimmed VTH+ threshold for reliable battery-powered turn-on.

Technical Context

The STM6600AS24DM6F implements a dual-threshold voltage monitoring architecture with precise 1.5 V reference (±1% accuracy) and factory-trimmed VTH+ (3.4 V typ.) and VTH– thresholds. Its logic detects falling edges on PB and SR inputs, applies tDEBOUNCE (typ. 40 ms) filtering, and validates power-up only when VCC exceeds VTH+ before PSHOLD is pulled high within tON_BLANK.

Smart Reset™ assertion requires simultaneous PB/SR press held for tSRD (set by CSRD capacitor charging time), while interrupt generation occurs on either undervoltage detection (VCC < VTH–) or short PB press during normal operation. All open-drain outputs (RST, INT, VCCLO, PBOUT) require external 10 kΩ pull-ups; EN is push-pull.

Key Specifications

Pinout & Package

STM6600AS24DM6F is housed in a TDFN12 (2 mm × 3 mm) package with 0.5 mm pitch, thermally enhanced exposed pad for low thermal resistance. Pin 12 is GND; pin 7 (VCCLO) and pins 9–11 (EN/EN, RST, INT) support mixed output types (push-pull or open-drain depending on variant).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar smart push-button controller applications.

Compared with TPS3808G33DBVR and MAX16050ETA+, STM6600AS24DM6F uniquely integrates push-button debouncing, Smart Reset™ delay tuning, PSHOLD-based startup lockout, and a precision 1.5 V reference - making it the sole option for battery-powered devices requiring hardware-enforced, user-initiated power sequencing with fail-safe confirmation.

Availability

STM6600AS24DM6F is available at Aetrix Electronics and suitable for portable medical monitors, industrial handheld terminals, wireless audio players, and smartphone accessory controllers requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for STM6600AS24DM6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog chips for industrial, automotive, and consumer markets.

The STM6600 series belongs to ST's Smart Power-On Controller product line, engineered specifically for secure, low-power, push-button-initiated power sequencing in battery-operated portable electronics with stringent startup reliability requirements.

FAQ

What is the function of the PSHOLD pin and why is it required?

PSHOLD is a startup confirmation input that must be pulled high within tON_BLANK (typically 250 ms) after power-on to validate MCU readiness. If unasserted, EN is deasserted to prevent unstable operation. This lockout mechanism ensures the host processor has initialized before enabling downstream circuitry - critical for avoiding corrupted boot sequences in portable devices.

Can the STM6600AS24DM6F operate without connecting the VREF pin?

Yes, but a 1 µF capacitor must still be connected to VREF even if unused. The internal 1.5 V reference is enabled automatically after tREC expires and disabled in standby mode. Leaving VREF floating violates the datasheet requirement and risks instability in the internal reference circuitry and voltage comparators.

How does the CSRD capacitor affect Smart Reset™ behavior?

The CSRD capacitor sets tSRD - the minimum time PB and SR must be held simultaneously to trigger Smart Reset™. Charging current ISRD (typ. 1.2 µA) flows into the capacitor until voltage reaches VSRD (typ. 1.25 V); tSRD ≈ (VSRD × CSRD) / ISRD. A 100 nF capacitor yields ~100 ms delay, allowing field adjustment without firmware changes.

Is the EN output truly push-pull, and what are its drive capabilities?

Yes, EN is push-pull with VOH ≥ 0.9 × VCC and VOL ≤ 0.4 V at IOL = 5 mA (per datasheet Table 5). It can directly drive logic-level N-channel MOSFET gates or enable inputs of DC-DC converters rated up to 5.5 V. No external level-shifting or buffering is required for standard 3.3 V or 5 V power rails.