STMicroelectronics STM6600DA55DM6F
- Part No.:
- STM6600DA55DM6F
- Manufacturer:
- STMicroelectronics
- Category:
- Supervisors
- Package:
- 12-WFDFN
- Datasheet:
-
STM6600DA55DM6F.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 12TDFN
- Quantity:
- Payment:

- Shipping:

Inventory:7,680
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STM6600DA55DM6F from STMicroelectronics is a smart push-button on/off controller with Smart Reset™ and power-on lockout functionality, designed for secure system power sequencing in battery-powered portable electronics. It operates from 1.6 V to 5.5 V, delivers 0.6 µA standby current, features a precise 1.5 V ±1% voltage reference, supports debounced PB/SR inputs with ±15 kV air-discharge ESD tolerance, and provides active-high or active-low enable output (EN/EN) for direct MOSFET or DC-DC converter control.
For engineers reviewing the STM6600DA55DM6F datasheet, STM6600DA55DM6F pinout, STM6600DA55DM6F application, or STM6600DA55DM6F equivalent, this device enables robust power-up confirmation via PSHOLD, configurable Smart Reset™ delay via CSRD capacitor, and dual-mode long-push response (RST assertion or EN deassertion), making it critical for fail-safe startup in handheld and embedded systems where supply integrity and user-initiated reset reliability are essential.
Technical Context
The STM6600DA55DM6F implements a state-machine-based power controller with factory-trimmed voltage thresholds (VTH+ = 3.4 V typ., VTH– hysteresis = 200 mV typ.) and integrated debounce logic for both PB and SR inputs. Its Smart Reset™ delay (tSRD) is externally programmable via CSRD capacitor charging at ISRD current, enabling precise long-press timing independent of supply voltage.
Startup requires valid PB press + VCC > VTH+, followed by PSHOLD confirmation within tON_BLANK - a fixed blanking period ensuring microprocessor readiness before EN assertion. During normal operation, INT asserts on undervoltage (VCC < VTH–) or PB press, while VCCLO provides dedicated high-threshold status indication and VREF supplies a stabilized 1.5 V reference with 1% accuracy over –40 °C to +85 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Operating Voltage | 1.6 V to 5.5 V - supports single-cell Li-ion, Li-polymer, and multi-cell alkaline/battery configurations without external regulation. |
| Standby Current | 0.6 µA - enables multi-year battery life in always-on portable devices with infrequent user interaction. |
| Voltage Reference Accuracy | 1.5 V ±1% - provides stable, temperature-compensated reference for external ADCs or comparator biasing. |
| ESD Tolerance (PB/SR) | ±15 kV air / ±8 kV contact - meets IEC 61000-4-2 Level 4 for rugged front-panel button interfaces. |
| Operating Temperature | –40 °C to +85 °C - qualified for industrial and consumer portable equipment operating in uncontrolled environments. |
| Debounce Period | tDEBOUNCE = 20 ms (typ.) - eliminates mechanical switch bounce without requiring firmware or external RC networks. |
| Smart Reset™ Delay Range | Programmable via CSRD capacitor - sets tSRD from ~100 ms to >1 s, enabling application-specific long-press detection windows. |
Pinout & Package
STM6600DA55DM6F is housed in a 2 × 3 mm TDFN12 package with exposed thermal pad, optimized for space-constrained portable PCB layouts and thermal performance in low-power applications.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VCC | Power supply input | Monitored supply rail; requires 0.1 µF local decoupling for stable startup and noise immunity. |
| 2 SR | Smart Reset™ button input | Active-low input with internal pull-up; detects simultaneous long press with PB to trigger RST or EN deassertion. |
| 3 VREF | Precise 1.5 V reference output | Stable ±1% reference; requires mandatory 1 µF ceramic capacitor even if unused to ensure internal stability. |
| 4 PSHOLD | Power-up confirmation input | Input must be driven high within tON_BLANK after PB press to confirm MCU readiness and sustain EN assertion. |
| 5 CSRD | Smart Reset™ delay timing input | Connects to external capacitor; charges at ISRD current to set tSRD duration for long-press qualification. |
| 6 PB | Push-button input | Active-low input with internal 100 kΩ pull-up; initiates power-up on press-and-hold, interrupt on short press during runtime. |
| 7 VCCLO | High-threshold comparator output | Open-drain signal low when VCC < VTH+; indicates undervoltage condition during startup or operation. |
| 8 PBOUT | Debounced PB status output | Open-drain output mirroring PB state post-debounce; used to distinguish PB vs. undervoltage source of INT assertion. |
| 9 EN / EN | Enable output | Push-pull output (EN) or open-drain (EN); directly drives gate of high-side PMOS or enable pin of DC-DC converter. |
| 10 RST | Reset output | Open-drain active-low reset pulse (tREC ≈ 200 ms); asserted after valid power-up or long PB+SR press per configuration. |
| 11 INT | Interrupt output | Open-drain active-low interrupt; signals PB press or VCC undervoltage, with PBOUT used to identify root cause. |
| 12 GND | Ground reference | System ground connection; ties to thermal pad for optimal thermal dissipation and noise rejection. |
Key Features
| Feature | Design Value |
|---|---|
| Smart Reset™ with adjustable delay | CSRD capacitor sets tSRD independently of supply voltage, enabling reliable long-press detection across battery discharge curves. |
| Secure power-up lockout | PSHOLD confirmation window (tON_BLANK) prevents false turn-on due to noisy switches or unresponsive processors. |
| Dual-mode long-press response | Factory-configurable to assert RST or deassert EN - supports either system reset or graceful shutdown based on application safety requirements. |
| Integrated 1.5 V ±1% reference | Eliminates need for external reference IC in systems requiring precision analog monitoring or calibration. |
| Robust ESD protection | ±15 kV air / ±8 kV contact on PB/SR pins - reduces risk of field failure in handheld devices with exposed buttons. |
Applications
| Portable Medical Monitors | Industrial Handheld Terminals |
|---|---|
Use Scenario: Battery-powered vital sign monitor requiring tamper-resistant power-on sequence and emergency reset. IC Role / Device Role / Timing Role: Controls main system power via high-side PMOS; validates MCU readiness via PSHOLD before enabling peripherals. Use Value: Prevents accidental power-on during transport and ensures processor initialization completes before power delivery, avoiding corrupted sensor data or unsafe states. |
Use Scenario: Ruggedized barcode scanner used in warehouse logistics with frequent button actuation and variable battery voltage. IC Role / Device Role / Timing Role: Manages power sequencing and provides undervoltage warning (VCCLO) and interrupt-driven wake-up (INT) from deep sleep. Use Value: Enables reliable startup down to 1.6 V and extends operational runtime via 0.6 µA standby current, while CSRD-programmed tSRD avoids false resets from transient button presses. |
| Wireless Audio Players | Smart Wearables |
Use Scenario: Bluetooth earbuds with mechanical power button and tight PCB space constraints. IC Role / Device Role / Timing Role: Provides compact, integrated power control with VREF supporting onboard battery gauge ADC and EN driving charge pump regulator. Use Value: Reduces BOM count by replacing discrete reset supervisor + voltage reference + debounce logic, while TDFN12 footprint fits sub-10 mm² layouts. |
Use Scenario: Fitness tracker with touch-sensitive UI and aggressive power budgeting. IC Role / Device Role / Timing Role: Delivers secure startup (PSHOLD), low-power interrupt wake-up (INT), and precise 1.5 V reference for analog front-end conditioning. Use Value: Achieves <1 µA system standby by leveraging 0.6 µA controller quiescent current and enables accurate battery voltage measurement across temperature using ±1% VREF. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar smart push-button on/off controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3808G33DBVR | Fixed 3.3 V reset threshold; no Smart Reset™ delay, PSHOLD, or PB/SR dual-input logic. | Lacks push-button interface and secure startup confirmation - suitable only for basic supply monitoring, not user-initiated power control. | Select only if application requires simple voltage supervisor without button management or reset timing flexibility. |
| MAX16050ETA+ | Programmable reset timeout but no integrated push-button debounce, ESD-hardened inputs, or VREF output. | No native support for mechanical button interface or battery-voltage-aware long-press detection; requires external circuitry for PB handling. | Choose only when existing design already includes robust debounce and ESD protection, and only reset timing configurability is needed. |
Compared with TPS3808G33DBVR and MAX16050ETA+, the STM6600DA55DM6F uniquely integrates push-button interface logic, Smart Reset™ delay programming, PSHOLD-based power-up validation, and a precision 1.5 V reference - eliminating four discrete components and enabling fail-safe, battery-aware power sequencing in space- and power-constrained portable systems.
Availability
STM6600DA55DM6F is available at Aetrix Electronics and suitable for portable medical monitors, industrial handheld terminals, wireless audio players, and smart wearables requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for STM6600DA55DM6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, delivering innovative solutions across automotive, industrial, power, and consumer markets with strong focus on energy efficiency and system integration.
The STM6600 series belongs to ST's Smart Power Management portfolio, designed specifically for intelligent, ultra-low-power system power control in battery-operated portable electronics where secure startup, user-initiated reset, and supply integrity monitoring are mission-critical.
FAQ
What is the function of the PSHOLD pin, and why is it required?
The PSHOLD pin confirms successful microcontroller initialization during power-up. After PB press and VCC validation, the MCU must drive PSHOLD high within tON_BLANK (typically 100–200 ms) to sustain EN assertion. If unmet, EN deasserts - preventing operation with an unresponsive or uninitialized processor. This is a hardware-enforced safety feature unique to the STM6600 family.
Can the STM6600DA55DM6F operate with a 1.8 V supply, and what is its behavior at that voltage?
Yes - the device operates from 1.6 V to 5.5 V. At 1.8 V, all core functions remain active: PB/SR inputs are fully debounced, VREF outputs 1.5 V ±1%, EN/EN drives loads, and INT/VCCLO provide accurate status. However, VTH+ threshold remains fixed at 3.4 V (typ.), so 1.8 V supply will not meet startup condition - the part enters standby mode until VCC rises above VTH+.
How is the Smart Reset™ delay (tSRD) calculated, and what capacitor value is recommended for a 500 ms delay?
tSRD is determined by CSRD capacitor charging time: tSRD ≈ (VSRD × CSRD) / ISRD, where VSRD = 1.25 V (typ.) and ISRD = 1.2 µA (typ.). For 500 ms, CSRD ≈ 0.5 s × 1.2 µA / 1.25 V ≈ 480 nF - a standard 470 nF X7R ceramic capacitor is recommended. Lower ESR improves timing accuracy and noise immunity.
Is the VREF output mandatory to use, and what happens if no capacitor is connected?
Yes - a 1 µF ceramic capacitor is mandatory on VREF, even if the reference is unused. Without it, internal regulation becomes unstable, causing erratic EN assertion, premature RST pulses, or failure to exit reset. The capacitor ensures loop stability and suppresses reference output noise; omitting it violates the device's absolute maximum operating conditions and risks functional failure.
STM6600DA55DM6F Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- Smart Reset™
- Package/Case:
- 12-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Smart ON/OFF Controller
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 2.5V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-TDFN (2x3)
STM6600DA55DM6F FAQ
1.How can I place an order for STM6600DA55DM6F through Aetrix?
Please submit a Request for Quotation (RFQ) for STM6600DA55DM6F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM6600DA55DM6F reliable?
The price and inventory of STM6600DA55DM6F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM6600DA55DM6F is usually 5 days.
3.What payment methods are accepted for STM6600DA55DM6F?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM6600DA55DM6F transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM6600DA55DM6F?
STM6600DA55DM6F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM6600DA55DM6F order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM6600DA55DM6F?
For technical support, including STM6600DA55DM6F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM6600DA55DM6F requirements.
6.How does Aetrix verify that STM6600DA55DM6F is sourced from the original manufacturer or authorized distributors?
All STM6600DA55DM6F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM6600DA55DM6F meets industry standards.
7.What is the process for return or replacement of STM6600DA55DM6F?
All STM6600DA55DM6F units undergo pre-shipment inspection (PSI). If there is an issue with STM6600DA55DM6F, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM6600DA55DM6F part is unused and in its original packaging.
Return procedure for STM6600DA55DM6F:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STM6600DA55DM6F Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

