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STMicroelectronics STM6600DQ25DM6F
- Part No.:
- STM6600DQ25DM6F
- Manufacturer:
- STMicroelectronics
- Category:
- Supervisors
- Package:
- 12-WFDFN
- Datasheet:
-
STM6600DQ25DM6F.pdf
- Description:
- IC SUPERVISOR 1 CHANNEL 12TDFN
- Quantity:
- Payment:
- Shipping:
Inventory:5,163
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Product details
Overview
STM6600DQ25DM6F from STMicroelectronics is a smart push-button on/off controller with integrated Smart Reset™, power-on lockout, and precise 1.5 V voltage reference (±1% accuracy). It operates from 1.6 V to 5.5 V, draws only 0.6 µA in standby, and supports debounced PB/SR inputs with ±15 kV air-discharge ESD tolerance. Used for secure system power sequencing in battery-powered portable devices.
For engineers reviewing the STM6600DQ25DM6F datasheet, STM6600DQ25DM6F pinout, STM6600DQ25DM6F application, or STM6600DQ25DM6F equivalent, key selection criteria include adjustable Smart Reset™ delay via CSRD capacitor, PSHOLD-driven startup confirmation, EN/EN output polarity option, and industrial −40 °C to +85 °C operation.
Technical Context
The STM6600 implements a state-machine-based power control architecture with factory-trimmed voltage thresholds (VTH+ = 3.4 V typ., VTH− hysteresis = 200 mV typ.) and glitch-immune edge detection on PB and SR inputs. Startup requires both valid VCC > VTH+ and PSHOLD high assertion within tON_BLANK - a fail-safe mechanism preventing false turn-on under faulty switch or unresponsive MCU conditions.
Smart Reset™ functionality is triggered by simultaneous PB+SR press held for tDEBOUNCE + tSRD, where tSRD is set by external CSRD capacitor charging at ISRD current. The device provides three independent open-drain outputs (RST, INT, VCCLO) and one push-pull enable output (EN/EN), each with defined assertion timing and recovery behavior tied to internal reset generator (tREC).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.6 V to 5.5 V - supports single-cell Li-ion, Li-polymer, and multi-cell alkaline systems without external LDO. |
| Standby Current | 0.6 µA - enables multi-year battery life in always-on portable devices with infrequent user interaction. |
| Voltage Reference Accuracy | ±1% over −40 °C to +85 °C - eliminates need for external precision reference in supply monitoring or ADC biasing. |
| ESD Tolerance (PB/SR) | ±15 kV air / ±8 kV contact - meets IEC 61000-4-2 Level 4 for robust front-panel button interfaces. |
| Operating Temperature | −40 °C to +85 °C - qualified for industrial and consumer portable equipment environments. |
| Debounce Period | Typ. 40 ms - suppresses mechanical switch bounce without requiring firmware or RC filtering. |
| tREC Reset Pulse Width | Min. 200 ms - ensures reliable MCU reset assertion during power-up and long-push events. |
Pinout & Package
STM6600DQ25DM6F is housed in a 12-pin TDFN package (2 mm × 3 mm, 0.5 mm pitch) with wettable flanks for automated optical inspection. Thermal pad exposed on underside improves power dissipation and solder joint reliability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VCC | Power supply input | Main supply rail monitored for VTH+ threshold; requires local 0.1 µF decoupling. |
| 2 SR | Smart Reset™ input | Active-low input for dual-button reset initiation; includes internal pull-up and ±8 kV HBM ESD protection. |
| 3 VREF | Precision reference output | 1.5 V ±1% reference; requires mandatory 1 µF bypass capacitor even if unused. |
| 4 PSHOLD | Power-up confirmation input | Input monitored during startup; must be pulled high within tON_BLANK to confirm valid MCU readiness. |
| 5 CSRD | Smart Reset™ delay timing | Capacitor-connected node setting tSRD delay; charged at ISRD current to VSRD threshold. |
| 6 PB | Push-button input | Active-low primary ON/OFF switch input with internal 100 kΩ pull-up and debounce logic. |
| 7 VCCLO | Undervoltage detection flag | Open-drain output low when VCC < VTH−; used for system-level brown-out warning or shutdown coordination. |
| 8 PBOUT | Debounced PB status | Open-drain output mirroring PB state after tDEBOUNCE; distinguishes short vs. long press timing. |
| 9 EN / EN | System power enable | Push-pull output asserting system power path; polarity configurable per variant (EN active-high, EN active-low). |
| 10 RST | Reset signal output | Open-drain reset pulse (tREC ≥ 200 ms) triggered at power-up or long PB+SR press. |
| 11 INT | Interrupt request | Open-drain interrupt asserted on undervoltage or PB press; PBOUT used to distinguish cause. |
| 12 GND | Ground reference | Primary return path; connects to thermal pad for improved thermal performance and EMI control. |
Key Features
| Feature | Design Value |
|---|---|
| Adjustable Smart Reset™ delay | tSRD set by external CSRD capacitor - enables field-tunable reset hold time without firmware change. |
| PSHOLD-driven startup lockout | Prevents system enable unless MCU confirms readiness within tON_BLANK - eliminates boot failure from hung processors. |
| Dual-mode enable output | Factory-configured EN (active-high) or EN (active-low) - simplifies interface to MOSFET gate drivers or DC-DC enable pins. |
| Integrated 1.5 V ±1% reference | Eliminates external reference IC in systems requiring precision biasing or ADC calibration references. |
| Three independent fault flags | VCCLO (undervoltage), INT (cause-distinguishable interrupt), RST (reset pulse) - enables granular system-level fault response. |
Applications
| Portable Medical Monitors | Industrial Handheld Terminals |
|---|---|
|
Use Scenario: Battery-powered glucose meter with single tactile button for ON/OFF and emergency reset. IC Role / Device Role / Timing Role: Controls main PMIC enable, asserts MCU reset on long press, and monitors battery voltage via VCCLO to prevent operation below safe cutoff. Use Value: Ensures reliable startup only when MCU is ready (via PSHOLD), extends battery life with 0.6 µA standby, and meets medical ESD requirements with ±15 kV air discharge tolerance. |
Use Scenario: Ruggedized warehouse scanner requiring tamper-resistant power sequencing and brown-out recovery. IC Role / Device Role / Timing Role: Manages MOSFET-based power rail, triggers controlled shutdown on undervoltage (INT), and provides precise 1.5 V reference for analog sensor conditioning. Use Value: Prevents corrupted firmware execution via tON_BLANK lockout, enables deterministic reset timing (tREC ≥ 200 ms), and sustains operation across −40 °C to +85 °C ambient. |
| Wireless Audio Players | Smart Wearables |
|
Use Scenario: Bluetooth earbud case with capacitive touch button and ultra-low-power sleep mode. IC Role / Device Role / Timing Role: Drives charge pump enable, generates interrupt on button press (INT), and uses PBOUT to differentiate wake-up vs. pairing mode activation. Use Value: Achieves sub-1 µA system standby by leveraging 0.6 µA controller quiescent current and automatic VREF disable in standby. |
Use Scenario: Fitness tracker with momentary side button for display wake-up and emergency SOS trigger. IC Role / Device Role / Timing Role: Controls buck converter enable (EN), asserts RST on dual-button SOS sequence, and monitors VCC via VCCLO to log low-battery events. Use Value: Guarantees secure SOS activation via PB+SR long press with tSRD-adjustable timing, and supports compact layout with 2 × 3 mm TDFN footprint. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar smart push-button controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS3808G33DBVR | Fixed 3.3 V reset threshold; no Smart Reset™, PSHOLD, or CSRD timing; only basic supervisor + reset. | Lacks push-button sequencing, dual-input reset, and programmable delay - suitable only for simple power-good monitoring. | Select only if application requires only voltage supervision without user-initiated power control or reset. |
| MAX16054ATA+ | Higher quiescent current (2.5 µA standby); no integrated VREF; fixed 2.93 V reset threshold; no PSHOLD lockout. | Supports basic push-button ON/OFF but lacks secure startup confirmation and adjustable Smart Reset™ delay. | Choose when cost sensitivity outweighs need for ultra-low standby current and advanced sequencing features. |
Compared with TPS3808G33DBVR and MAX16054ATA+, STM6600DQ25DM6F uniquely integrates PSHOLD-driven startup validation, field-adjustable Smart Reset™ timing, and a precision 1.5 V reference - enabling secure, low-power, and feature-rich power management in space-constrained portable systems.
Availability
STM6600DQ25DM6F is available at Aetrix Electronics and suitable for portable medical monitors, industrial handheld terminals, wireless audio players, and smart wearables requiring stable component supply across extended product lifecycles.
Supply support for STM6600DQ25DM6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in microcontrollers, power management, and analog/mixed-signal ICs for industrial, automotive, and consumer markets.
STM6600 belongs to ST's Smart Power-On Controller product line, designed specifically for secure, low-power, and ESD-hardened push-button power sequencing in battery-operated portable electronics.
FAQ
What is the function of the PSHOLD pin, and why is it required?
The PSHOLD pin confirms successful MCU initialization during power-up. On STM6600DQ25DM6F, EN remains deasserted unless PSHOLD is driven high within tON_BLANK (typically 100–200 ms). This prevents system enable if the MCU is unresponsive or fails to initialize - a critical safety feature for portable devices with non-volatile memory or real-time clocks.
Can the VREF output be left unconnected if not used in the design?
No. A 1 µF ceramic capacitor is mandatory on VREF regardless of usage, as specified in ST's datasheet (Section 2, Pin Descriptions). Omitting this capacitor causes instability in internal reference regulation and may lead to erratic reset behavior or false undervoltage assertions on VCCLO and INT outputs.
How does the CSRD capacitor affect Smart Reset™ timing?
The CSRD capacitor sets tSRD - the additional time PB and SR must be held together before Smart Reset™ activates. tSRD = (VSRD / ISRD) × CCSRD, where VSRD ≈ 1.2 V and ISRD ≈ 1.2 µA (typ.). For example, a 100 nF capacitor yields ~100 ms tSRD. This allows designers to tune reset hold time without firmware changes or PCB rework.
Is STM6600DQ25DM6F pin-compatible with STM6601 variants?
No. While both share the same TDFN12 package and pinout, STM6600 and STM6601 differ in startup logic: STM6600 requires PB to remain pressed until PSHOLD is asserted, whereas STM6601 allows PB release before tON_BLANK expires. This functional difference affects system firmware timing and cannot be interchanged without validation.
STM6600DQ25DM6F Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- Smart Reset™
- Package/Case:
- 12-WFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Smart ON/OFF Controller
- Number of Voltages Monitored:
- 1
- Voltage - Threshold:
- 3.3V
- Output:
- Open Drain or Open Collector
- Reset:
- Active Low
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 12-TDFN (2x3)
STM6600DQ25DM6F FAQ
1.How can I place an order for STM6600DQ25DM6F through Aetrix?
Please submit a Request for Quotation (RFQ) for STM6600DQ25DM6F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STM6600DQ25DM6F reliable?
The price and inventory of STM6600DQ25DM6F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STM6600DQ25DM6F is usually 5 days.
3.What payment methods are accepted for STM6600DQ25DM6F?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STM6600DQ25DM6F transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STM6600DQ25DM6F?
STM6600DQ25DM6F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STM6600DQ25DM6F order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STM6600DQ25DM6F?
For technical support, including STM6600DQ25DM6F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STM6600DQ25DM6F requirements.
6.How does Aetrix verify that STM6600DQ25DM6F is sourced from the original manufacturer or authorized distributors?
All STM6600DQ25DM6F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STM6600DQ25DM6F meets industry standards.
7.What is the process for return or replacement of STM6600DQ25DM6F?
All STM6600DQ25DM6F units undergo pre-shipment inspection (PSI). If there is an issue with STM6600DQ25DM6F, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STM6600DQ25DM6F part is unused and in its original packaging.
Return procedure for STM6600DQ25DM6F:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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