STMicroelectronics STM6717SFWY6F

Overview

STM6717SFWY6F from STMicroelectronics is a dual ultra-low-voltage supervisor IC with push-button reset, monitoring VCC1 (primary supply) and VCC2 (secondary supply), featuring factory-programmed reset thresholds of 4.63 V and 3.08 V respectively, active-low open-drain RST output, manual reset input (MR), and guaranteed RST state down to VCC ≥ 0.8 V - used in battery-powered networking equipment and portable embedded systems.

For engineers reviewing the STM6717SFWY6F datasheet, STM6717SFWY6F pinout, STM6717SFWY6F application, or STM6717SFWY6F equivalent, key selection concerns include dual-supply monitoring accuracy, MR debouncing capability without external circuitry, open-drain RST compatibility with bi-directional processor reset pins, and SOT23-5 footprint constraints in space-constrained designs.

Technical Context

The device implements independent voltage comparators for VCC1 and VCC2 against fixed internal thresholds, with logic arbitration ensuring RST remains asserted low until both supplies exceed their respective thresholds and MR returns high. Reset assertion is latched and held for a guaranteed minimum delay (trec = 13.2 ms typ) after all conditions are satisfied.

RST output uses open-drain topology referenced to VCC1, requiring an external pull-up resistor (typically 10 kΩ); MR includes an internal 50 kΩ pull-up to VCC1 and accepts TTL/CMOS logic levels or momentary switch-to-VSS connection - no external debounce needed under standard EMI conditions.

Key Specifications

Pinout & Package

SOT23-5 (WY) package: 5-pin surface-mount, 1.3 mm × 2.9 mm footprint, 1.45 mm height, lead-free and RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-supply supervisor applications.

Compared with TPS3808G18DBVR and MAX6326UT29D3+, STM6717SFWY6F uniquely integrates dual-rail monitoring, MR with internal pull-up, and open-drain RST in a single SOT23-5 package - reducing component count and board area while supporting both automatic and user-triggered reset in compact embedded systems.

Availability

STM6717SFWY6F is available at Aetrix Electronics and suitable for industrial networking equipment, portable medical instrumentation, and wireless gateway designs requiring stable component supply across extended product lifecycles.

Supply support for STM6717SFWY6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog products for industrial, automotive, and consumer markets.

STM67xx supervisors belong to ST's precision voltage monitoring product line, engineered specifically for ultra-low-power, dual-rail supervision in space- and energy-constrained embedded systems - emphasizing reliability, small footprint, and minimal external component count.

FAQ

What is the function of the MR pin, and does it require external components?

The MR (Manual Reset) pin is an active-low input that forces RST low when asserted. It features an internal 50 kΩ pull-up resistor to VCC1, allowing direct connection to a normally open momentary switch between MR and VSS. No external resistor or capacitor is required for basic operation, though a 0.1 µF capacitor from MR to VSS improves noise immunity in electrically noisy environments.

Can STM6717SFWY6F monitor a third supply voltage?

No - STM6717SFWY6F monitors only two supplies: VCC1 (4.63 V threshold) and VCC2 (3.08 V threshold). The RSTIN pin is absent in this variant (SOT23-5, WY package); third-supply monitoring requires STM6719/20/79/80 variants with SOT23-6 packaging and an external resistor divider referenced to the 0.626 V internal reference.

What is the minimum supply voltage required for valid RST output behavior?

The device guarantees correct RST logic state (low when asserted, high-impedance otherwise) whenever VCC1 or VCC2 is ≥ 0.8 V. Below this, RST output is undefined. This specification ensures robust reset assertion during deep brownout conditions common in battery-powered systems approaching end-of-life voltage.

How does the open-drain RST output interface with a processor having a bi-directional reset pin?

Direct connection is supported: tie RST to the processor's bidirectional reset pin via a 4.7 kΩ series resistor. This prevents logic contention when the processor drives the line low during its own reset sequence. The open-drain structure allows safe wired-OR sharing with other reset sources without risk of shoot-through current.