STMicroelectronics STM6777SFWB6F

Overview

STM6777SFWB6F from STMicroelectronics is a dual ultra-low-voltage supervisor IC with push-button reset and factory-programmed reset thresholds (VCC1 = 2.93 V, VCC2 = 1.58 V), active-low open-drain RST output, manual reset (MR) input, and delayed manual reset (MRC) pin. It monitors primary and secondary supply rails in battery-powered embedded systems and guarantees valid reset state down to VCC ≥ 0.8 V.

For engineers reviewing the STM6777SFWB6F datasheet, STM6777SFWB6F pinout, STM6777SFWB6F application, or STM6777SFWB6F equivalent, key selection criteria include dual-supply monitoring tolerance, MRC-based manual reset delay configurability, open-drain RST compatibility with bi-directional processor reset pins, and industrial-grade (–40 °C to +85 °C) operation in SOT23-6 package.

Technical Context

The device implements independent voltage comparators for VCC1 and VCC2, each with factory-trimmed thresholds (2.93 V and 1.58 V respectively), and uses an internal 0.626 V reference for external RSTIN threshold adjustment. Reset assertion occurs when either monitored supply falls below its threshold or MR is pulled low.

Reset release is synchronized to trec delay (13.2 ms typ) after all supplies recover and MR returns high; MRC enables user-configurable delay (≥6 µs) on manual reset initiation via external capacitor. The open-drain RST output requires external pull-up to VCC1 and remains valid over full operating temperature range.

Key Specifications

Pinout & Package

SOT23-6 (WB) package: 6-pin surface-mount, 1.3 mm × 2.9 mm footprint, 1.45 mm height, lead-free and RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-supply supervisor applications.

Compared with STM6777SFWB6F, STM6778SFWB6F simplifies board layout by eliminating the pull-up resistor but sacrifices interoperability with bidirectional reset interfaces; TPS3808G18DBVR reduces cost and size but removes critical dual-monitoring and delay functionality required for robust multi-rail systems.

Availability

STM6777SFWB6F is available at Aetrix Electronics and suitable for set-top box power sequencing, portable medical monitors, industrial Ethernet gateways, and smart home hubs requiring stable component supply with guaranteed long-term availability.

Supply support for STM6777SFWB6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog components for industrial, automotive, and consumer markets.

The STM67xx family targets ultra-low-power, multi-rail supervision in space-constrained portable and embedded systems - emphasizing factory-trimmed accuracy, minimal quiescent current, and hardware-managed reset timing.

FAQ

What is the function of the MRC pin on STM6777SFWB6F?

The MRC (Manual Reset Delay) pin accepts an external capacitor connected to VSS to introduce a configurable delay between MR button press and RST assertion. With a 3.3 µF capacitor, it delivers ~4 s delay; minimum delay is 6 µs when MRC is left open. This prevents spurious resets from mechanical switch bounce or short transients.

Can STM6777SFWB6F monitor a 1.2 V supply rail?

No - VCC2 threshold is factory-programmed to 1.58 V and cannot be adjusted. However, the RSTIN pin supports monitoring of lower voltages (e.g., 1.2 V) using an external resistor divider referenced to the internal 0.626 V comparator threshold. This requires two precision resistors and adds board area but enables full flexibility.

Is an external pull-up resistor required for the RST pin?

Yes - because RST is open-drain, a pull-up resistor (typically 10 kΩ to VCC1) is mandatory to establish a defined high state when reset is inactive. Without it, the reset line floats, risking undefined processor behavior. The value must be chosen to ensure sufficient rise time while minimizing current draw during reset assertion.

How does STM6777SFWB6F behave when VCC1 drops below 0.8 V?

The device guarantees correct RST logic state only when VCC1 or VCC2 ≥ 0.8 V. Below that, RST becomes indeterminate - it may float or revert to high impedance. For applications requiring valid reset down to 0 V, a pull-down resistor (e.g., 100 kΩ to VSS) is recommended on push-pull variants, but this approach is invalid for STM6777SFWB6F's open-drain output.