STMicroelectronics STM795SM6F

Overview

STM795SM6F from STMicroelectronics is a 3 V supply voltage supervisor IC with integrated battery switchover and chip-enable gating for external low-power SRAM (LPSRAM). It provides active-low RST output, manual reset input (MR), VCC switch output (Vccsw), and conditioned chip-enable output (ECON). Key confirmed parameters: 200 ms typical reset timeout (trec), 7 ns max propagation delay for chip-enable gating, 0.4 µA typical battery supply current, guaranteed RST assertion down to VCC = 1.0 V, and industrial temperature range (–40 °C to +85 °C). It is used in embedded systems requiring non-volatile SRAM backup during main power loss.

For engineers reviewing the STM795SM6F datasheet, STM795SM6F pinout, STM795SM6F application, or STM795SM6F equivalent, key selection considerations include its unique chip-enable gating function (absent in STM690/704/802/804/805/806), absence of watchdog timer and power-fail comparator, push-pull RST output, and SO8 package compatibility with LPSRAM interface timing constraints.

Technical Context

The STM795 implements a precision voltage monitor with reset threshold VRST ≈ 2.93 V (typ) and switchover voltage VSW = 2.4 V, enabling automatic VCC-to-VBAT transition for external LPSRAM. Its E/ECON circuitry provides conditional chip-enable control: ECON goes low only when E is low *and* reset is not asserted, with 15 µs minimum hold time if reset asserts while E is low.

VOUT is driven by an internal P-channel MOSFET switch (R_ON ≈ 100 Ω) connecting either VCC or VBAT, while Vccsw provides a push-pull logic-level signal indicating switchover state. Unlike other family members, STM795 omits WDI, PFI/PFO, and watchdog functionality - confirmed by datasheet Table 1 and Section 2.3/2.8 - making it a dedicated LPSRAM supervisor with simplified power-monitoring scope.

Key Specifications

Pinout & Package

STM795SM6F is housed in an 8-pin SO8 (Small Outline) package per STMicroelectronics DocID10519 Rev 10, Section 6.1. Pin assignments are validated from Figure 6 and Table 3 of the official datasheet.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar LPSRAM supervisor applications.

Compared with STM805SM6F and MAX691ACPE+, STM795SM6F uniquely combines battery switchover, push-pull RST, and sub-10 ns chip-enable gating - making it the only option optimized for high-reliability, low-latency LPSRAM backup in 3 V industrial systems without watchdog or PFI overhead.

Availability

STM795SM6F is available at Aetrix Electronics and suitable for smart meter data retention, industrial HMI SRAM backup, and medical infusion pump memory requiring stable component supply with long-term industrial-grade availability.

Supply support for STM795SM6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog devices for industrial, automotive, and consumer markets.

The STM690/704/795/802/804/805/806 series was developed specifically to provide integrated, low-power supervisory functions for external LPSRAM in battery-backed embedded systems - with STM795SM6F targeting applications where chip-enable gating and minimal battery drain are critical.

FAQ

What is the function of the ECON pin on STM795SM6F?

ECON is a conditioned chip-enable output that goes low only when both the E pin is low *and* the RST output is de-asserted. If reset asserts while E is low, ECON remains low for 15 µs or until E goes high - ensuring LPSRAM write-enable is blocked during reset recovery. It is designed to drive the CE input of external LPSRAM directly.

Does STM795SM6F include a watchdog timer or power-fail comparator?

No. STM795SM6F explicitly omits both the watchdog timer (WDI pin absent) and power-fail comparator (PFI/PFO pins not functional - PFO is NC) as confirmed in Table 1 and Section 2.3/2.8 of the official datasheet. This distinguishes it from STM690/802/804/805/806 and makes it a dedicated LPSRAM supervisor without those features.

Can STM795SM6F support LPSRAM loads exceeding 75 mA?

Yes. While VOUT delivers up to 75 mA directly, the Vccsw pin provides a push-pull logic signal indicating switchover state. This signal can drive the gate of an external PMOS transistor to boost current capability beyond 75 mA - a design method explicitly documented in Section 1.1.8 and Figure 11 of the datasheet.

What is the maximum allowable VBAT voltage relative to VCC?

VBAT may exceed VCC, as stated in Section 1.1.11. The device's internal switchover circuitry safely handles VBAT > VCC during battery backup mode. When no battery is used, VBAT must be connected to VCC per datasheet guidance - not left floating - to ensure proper VOUT sourcing and avoid undefined behavior.