STMicroelectronics STM804SM6F

Overview

STM804SM6F from STMicroelectronics is a 3 V microprocessor supervisory IC with active-high open-drain RST output, automatic battery switchover, power-fail comparator (PFI/PFO), manual reset input (MR), and watchdog timer (1.6 s typ). It guarantees reset assertion down to VCC = 1.0 V and operates from –40 °C to +85 °C for industrial embedded systems requiring reliable power monitoring and SRAM backup control.

For engineers reviewing the STM804SM6F datasheet, STM804SM6F pinout, STM804SM6F application, or STM804SM6F equivalent, key selection considerations include its open-drain active-high reset behavior, 200 ms typical reset timeout (trec), low 40 µA supply current, 0.4 µA battery supply current, and integrated VCC-to-VBAT switchover at 2.4 V threshold for non-volatile SRAM retention.

Technical Context

The STM804 implements a precision voltage monitor with a fixed 2.63 V reset threshold (VRST) and 2.4 V switchover voltage (VSW), enabling deterministic reset assertion during brownout and seamless LPSRAM backup switching. Its internal watchdog timer triggers reset if WDI remains static for ≥1.6 s, and the PFI/PFO comparator provides early power-fail warning when VCC drops below VSW or PFI falls below VPFI (typically 1.25 V).

Reset logic combines three independent assertion sources - VCC undervoltage, MR low pulse, and watchdog timeout - all forcing RST high (open-drain) for ≥200 ms (trec). Battery switchover uses an internal P-channel MOSFET switch (100 Ω typical on-resistance) between VBAT and VOUT, with Vccsw providing a push-pull status signal indicating battery-active state.

Key Specifications

Pinout & Package

STM804SM6F is housed in an SO8 (Small Outline 8-pin) package per JEDEC MS-012, with 1.27 mm pitch, 4.9 mm × 3.9 mm body, and gull-wing leads. Pin 1 is marked with a dot or bevelled corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar microprocessor supervisory applications.

Compared with STM804SM6F, MAX6326UT26D3+ omits critical battery management and watchdog features, while TPS3808G33DBVR raises reset voltage and removes switchover-neither supports the integrated LPSRAM backup and dual-rail monitoring required in industrial data retention designs.

Availability

STM804SM6F is available at Aetrix Electronics and suitable for industrial PLC controllers, smart meter data loggers, medical infusion pumps, and POS terminals requiring stable component supply with long-term lifecycle assurance.

Supply support for STM804SM6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, microcontroller, power, and sensor solutions for industrial, automotive, and consumer markets.

The STM690/80x supervisor family targets industrial and embedded systems needing deterministic power monitoring, non-volatile memory protection, and fail-safe reset sequencing - with STM804SM6F optimized for 3 V systems requiring active-high reset and battery-backed SRAM retention.

FAQ

What is the function of the Vccsw pin on STM804SM6F?

Vccsw is a push-pull output that goes high when VOUT switches from VCC to VBAT, and low when VOUT reconnects to VCC. It enables driving the gate of an external PMOS transistor to extend VOUT current capability beyond the internal 75 mA limit, supporting higher-current backup loads such as larger SRAM arrays or RTC modules.

Can STM804SM6F operate without a backup battery?

Yes. When no battery is used, connect both VBAT and VOUT directly to VCC. The device functions fully as a reset supervisor and power-fail detector, with RST assertion guaranteed down to VCC = 1.0 V. Battery switchover logic is disabled, and VOUT remains tied to VCC at all times.

How does the watchdog timer interact with the manual reset (MR) input?

The watchdog timer is cleared whenever MR is asserted (low), and remains inactive while reset is active. After MR returns high, the watchdog resumes counting from zero. This ensures that a manual reset event fully resets the watchdog state, preventing spurious timeouts during intentional system reinitialization.

What is the maximum load current supported on the VOUT pin?

VOUT supports up to 75 mA continuous current when sourcing from VCC or VBAT. Exceeding this draws excessive voltage drop across the internal P-channel MOSFET switch (100 Ω typical on-resistance). For higher loads, use Vccsw to drive an external PMOS transistor in parallel with the internal switch.