STMicroelectronics STM804TM6F

Overview

STM804TM6F from STMicroelectronics is a 3 V industrial-grade microprocessor supervisory IC with automatic battery switchover, active-high open-drain RST output, power-fail comparator (PFI/PFO), and manual reset (MR) input. It guarantees reset assertion down to VCC = 1.0 V, delivers 200 ms typical reset timeout (trec), and draws only 40 µA typical supply current. Used in embedded systems requiring non-volatile SRAM backup during main power loss.

For engineers reviewing the STM804TM6F datasheet, STM804TM6F pinout, STM804TM6F application, or STM804TM6F equivalent, key selection criteria include its open-drain active-high reset architecture, 2.4 V switchover threshold (VSW), 1.6 s watchdog timeout, low 0.4 µA battery supply current, and compatibility with external LPSRAM retention circuits.

Technical Context

The STM804TM6F integrates a precision voltage reference, dual comparators (for VCC monitoring and PFI detection), and a 1.6 s watchdog timer that clears on WDI edge transitions. Its reset logic asserts RST high when VCC exceeds VRST (2.63 V typ) and holds for trec (200 ms typ), with guaranteed validity across –40 °C to +85 °C.

Battery switchover is implemented via an internal P-channel MOSFET switch connecting VBAT to VOUT when VCC falls below VSW = 2.4 V; Vccsw provides a push-pull indicator signal of the switchover state. The PFI/PFO pair delivers early power-fail warning with 10 µs typical propagation delay and 100 mV hysteresis.

Key Specifications

Pinout & Package

STM804TM6F is housed in an 8-pin SO8 (Small Outline Integrated Circuit) package, measuring 4.9 mm × 3.9 mm × 1.75 mm, with 1.27 mm lead pitch and RoHS-compliant lead-free finish.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar supervisor applications.

Compared with MAX691ACSA+ and TPS3808G12DBVR, STM804TM6F uniquely integrates battery switchover, PFI/PFO, and open-drain RST in one SO8 package-reducing BOM count and PCB area while enabling autonomous SRAM retention without external FETs or comparators.

Availability

STM804TM6F is available at Aetrix Electronics and suitable for industrial PLC memory backup, smart meter data retention, and medical infusion pump state hold requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for STM804TM6F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog products for industrial, automotive, and consumer markets.

The STM80x series is part of ST's dedicated supervisor IC portfolio, engineered specifically for robust, low-power microprocessor monitoring and non-volatile SRAM backup in mission-critical industrial and metering applications.

FAQ

What is the function of the Vccsw pin on STM804TM6F?

Vccsw is a push-pull output that goes high when VOUT switches from VCC to VBAT, and low when VOUT reconnects to VCC. It provides a clean logic-level signal to drive the gate of an external PMOS transistor, enabling higher IOUT (>75 mA) for demanding SRAM backup loads beyond the internal switch capability.

Can STM804TM6F operate without a backup battery?

Yes. When no battery is used, connect both VBAT and VOUT directly to VCC. In this configuration, the device functions as a standard 3 V supervisor with RST, MR, WDI, and PFI/PFO - retaining all monitoring and reset features while disabling battery switchover logic.

How does the watchdog timer interact with the manual reset (MR) input?

The watchdog timer is disabled while reset is asserted - whether triggered by MR, VCC dropout, or watchdog timeout. When MR is held low, the internal watchdog timer stops counting; it resumes only after MR returns high and reset is released, ensuring no spurious timeouts during intentional reset sequences.

Is the PFI input required for basic supervisor operation?

No. PFI is optional: connect it to ground if unused. The core supervisor functions - VCC monitoring, RST generation, MR, and WDI - operate independently. PFI adds early power-fail detection capability; omitting it disables PFO assertion based on PFI but retains VCC-based PFO triggering.