STMicroelectronics STM8L151G6U6TR

Overview

STM8L151G6U6TR from STMicroelectronics is an 8-bit ultra-low-power microcontroller featuring 32 KB Flash, 1 KB data EEPROM with ECC, 2 KB RAM, 12-bit ADC (1 Msps, 25 channels), 12-bit DAC, two ultra-low-power comparators, RTC with BCD calendar and auto-wakeup, and capacitive touch sensing (16 channels). It operates from 1.65 V to 3.6 V across –40 °C to 125 °C and targets battery-powered industrial sensors and portable medical devices.

For engineers reviewing the STM8L151G6U6TR datasheet, STM8L151G6U6TR pinout, STM8L151G6U6TR application, or STM8L151G6U6TR equivalent, key selection criteria include verified Halt-mode current (350 nA), RTC accuracy with external 32 kHz crystal, DAC output buffer capability on PB4–PB6, and SWIM-based non-intrusive debugging support.

Technical Context

The STM8L151G6U6TR implements a Harvard-architecture STM8 core with 3-stage pipeline, delivering 16 CISC MIPS at 16 MHz. It integrates dual clock domains: high-speed (1–16 MHz HSE or 16 MHz factory-trimmed RC) and low-power (32 kHz LSE or 38 kHz RC), managed by a clock security system with failover detection.

Its power architecture supports five distinct low-power modes - including Active-halt (1.3 µA with full RTC) and Halt (350 nA) - enabled by programmable voltage detector (PVD), ultra-safe BOR with five thresholds, and per-pin leakage control (50 nA/I/O). The 12-bit ADC includes internal temperature sensor and reference voltage, while the DAC features rail-to-rail buffered output on dedicated pins.

Key Specifications

Pinout & Package

STM8L151G6U6TR is housed in a 28-pin UFQFPN package (4 × 4 mm, 0.5 mm pitch), optimized for space-constrained ultra-low-power applications. Pin functions are fully mappable to interrupt vectors, with dedicated I/Os for DAC output (PB4–PB6), RTC oscillator (PC14/PC15), and SWIM debug interface (PD2).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ultra-low-power 8-bit MCU applications.

Compared with STM8L151G6U6TR, STM8L052C6T6 reduces feature count and cost but removes DAC and touch capability, while STM32L011K4T6 offers 32-bit performance at higher design complexity and marginal active-current advantage - making STM8L151G6U6TR optimal for cost-sensitive, analog-rich ultra-low-power 8-bit control.

Availability

STM8L151G6U6TR is available at Aetrix Electronics and suitable for smart utility metering, portable medical monitors, and industrial wireless sensor nodes requiring stable component supply across extended temperature ranges and multi-year production cycles.

Supply support for STM8L151G6U6TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and automotive-grade components since 1987.

The STM8L ultra-low-power MCU family targets battery-operated and energy-constrained applications, emphasizing sub-µA sleep modes, integrated analog peripherals, and robust operation from 1.65 V to 3.6 V across industrial and extended temperature grades.

FAQ

What is the minimum operating voltage for STM8L151G6U6TR in Halt mode?

The STM8L151G6U6TR supports Halt mode operation down to 1.65 V, maintaining RTC functionality and 350 nA current consumption. Below 1.65 V, the ultra-safe BOR circuit asserts reset to prevent undefined behavior - this threshold is fixed and not user-configurable.

Does STM8L151G6U6TR support true hardware AES encryption?

No. The STM8L151G6U6TR does not integrate hardware AES acceleration or cryptographic peripherals. It provides a 96-bit unique ID for device identity and software-based security primitives only; secure boot or encrypted firmware updates require external co-processors or host-level implementation.

Can the 12-bit DAC output drive a 10 kΩ load without gain error?

Yes. The DAC output buffer is specified to maintain monotonicity and ±1 LSB INL across a 10 kΩ load at VDD ≥ 2.4 V. Load regulation error remains within ±0.5 mV up to 10 kΩ, verified per Table 52 in DS6372 Rev 17.

Is SWIM debugging compatible with JTAG/SWD adapters?

No. SWIM (Single-Wire Interface Module) is ST's proprietary debug interface and requires ST-LINK/V2 or compatible SWIM-capable programmers. It is electrically and protocol-incompatible with JTAG or SWD; no adapter or bridge exists to translate between them.