STMicroelectronics STMPE1601TBR
- Part No.:
- STMPE1601TBR
- Manufacturer:
- STMicroelectronics
- Category:
- I/O Expanders
- Package:
- 25-TFBGA
- Datasheet:
-
STMPE1601TBR.pdf
- Description:
- IC XPNDR 400KHZ I2C 25TFBGA
- Quantity:
- Payment:

- Shipping:

Inventory:3,780
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STMPE1601TBR from STMicroelectronics is a 16-bit GPIO port expander with integrated 8×8 keypad controller, four basic PWM channels for LED brightness control, and programmable level translation. It operates from 1.8–3.3 V dual supplies (VCC for core/I²C, VIO for GPIOs), supports hibernation-mode keypress detection, and delivers ultra-low hibernate current (0.5–3 µA). It targets mobile UI subsystems requiring compact, low-power I/O expansion in smartphones and portable media players.
For engineers reviewing the STMPE1601TBR datasheet, STMPE1601TBR pinout, STMPE1601TBR application, or STMPE1601TBR equivalent, this page provides verified technical context on its keypad scanning architecture, I²C address configuration via GPIO_13–GPIO_15, hibernate wake-up latency, and PWM resolution limitations per channel - all critical for battery-sensitive embedded UI designs.
Technical Context
The device implements an I²C slave interface compliant with Philips I²C spec v2.1, supporting standard (100 kbps) and fast (400 kbps) modes with 7-bit addressing (eight possible addresses via A2–A0 pins). Its keypad controller scans up to 64 keys (8 rows × 8 columns) using dedicated KP_X/KP_Y GPIO banks and detects presses during hibernate mode by monitoring edge-triggered transitions on configured key lines.
Four independent basic PWM controllers provide 8-bit resolution output with configurable period and duty cycle, each capable of driving LED loads directly. The GPIO bank is split into two voltage domains: GPIO_0–GPIO_7 powered by VCC (1.8–3.3 V), and GPIO_8–GPIO_15 powered by VIO (1.8–3.3 V, ≥ VCC), enabling level translation across logic domains without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| GPIO Count | 16 total I/Os: 8 at VCC domain, 8 at VIO domain, each configurable as input/output/keypad/PWM |
| Keypad Support | Hardware-accelerated 8×8 matrix scan with 4 optional dedicated keys; keypress detect active in hibernate mode |
| PWM Channels | 4 independent 8-bit basic PWM outputs for LED backlight brightness control, no auto-reload or advanced timing |
| Supply Range | VCC = 1.65–3.6 V (core/I²C); VIO = 1.65–3.6 V (GPIOs), with VIO ≥ VCC requirement enforced |
| Power Consumption | Hibernate current: 0.5–3 µA; Sleep current: 18–75 µA; Active current: 1.2–4.8 mA (dependent on VCC/VIO and temperature) |
| I²C Interface | 7-bit slave address (0x40–0x47), supports General Call, auto-increment register reads/writes in defined address ranges |
| Interrupt Output | Open-drain INT pin with external pull-up; asserts on keypad event, PWM trigger, or GPIO change, configurable per source |
Pinout & Package
Package: TFBGA25 (3 mm × 3 mm, 0.5 mm pitch, top-through view).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GPIO_0–GPIO_7 | Bi-directional I/O / Keypad X0–X7 / PWM_0–PWM_3 | Core-supplied (VCC) pins; support Schmitt-trigger inputs, internal pull-ups (50–150 kΩ), and alternate keypad/PWM functions |
| GPIO_8–GPIO_15 | Bi-directional I/O / Keypad Y0–Y7 / I²C ADDR0–ADDR2 | IO-supplied (VIO) pins; serve as keypad column drivers or I²C address inputs during reset; require external pull-up/down for address setting |
| INT | Open-drain interrupt output | Asserts low on configured events; must be externally pulled up to VCC (or ≤3.6 V); not internally biased |
| RESET_N | Active-low asynchronous reset input | Internally pulled up to VCC; requires ≥20 µs pulse width; resets register state and exits hibernate |
| SCLK / SDATA | I²C clock and data lines | 3.6 V-tolerant; operate at VCC voltage; require external pull-ups per I²C bus requirements |
| CLK_IN | 32 kHz clock input | Optional external clock source; internally pulled up to VCC; 10 kΩ external pull-up recommended if unused |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Keypad Controller | Dedicated scan engine reduces host CPU load; supports hibernate wake-up on keypress without full power-up |
| Dual-Voltage GPIO Banks | Enables seamless level translation between 1.8 V and 3.3 V domains without discrete translators or voltage shifters |
| Ultra-Low Hibernate Current | Sub-µA hibernate draw (0.5–3 µA) extends battery life in always-on UI applications like smartphone lock screens |
| Configurable I²C Addressing | Three GPIO pins (GPIO_13–GPIO_15) set 7-bit address at power-on; enables up to eight devices on one I²C bus |
| Programmable Level Translator | 8-channel translator allows mixed-voltage system interfacing; direction and voltage thresholds are fixed per pin group |
Applications
| Smartphone Touchscreen UI | Portable Media Player Keypad |
|---|---|
Use Scenario: Managing physical keypad and backlight brightness in entry-level Android smartphones with limited SoC GPIOs. IC Role / Device Role / Timing Role: Offloads keypad scanning and LED dimming from AP; generates interrupt on keypress to wake AP from suspend. Use Value: Reduces AP firmware complexity and eliminates need for discrete keypad scanner IC or PWM driver, saving PCB area and BOM cost. | Use Scenario: Driving mechanical keypad and status LEDs in battery-powered MP3 players with strict standby current limits. IC Role / Device Role / Timing Role: Provides hibernate-mode key wake-up and synchronized 4-channel LED dimming via I²C-configurable PWM registers. Use Value: Achieves <3 µA hibernate current while maintaining responsive UI feedback, extending playback time by >15% versus discrete solutions. |
| Game Console D-Pad Interface | Industrial Handheld Terminal |
Use Scenario: Scanning directional pad and action buttons in handheld gaming devices where tactile response and low latency matter. IC Role / Device Role / Timing Role: Dedicated keypad controller handles debounced scan at 10–100 Hz; INT pin signals key state changes with <100 µs latency. Use Value: Guarantees consistent 8×8 matrix scan timing independent of host CPU load, eliminating input lag during gameplay. | Use Scenario: Expanding GPIOs for membrane keypad, status indicators, and sensor interface in ruggedized field terminals. IC Role / Device Role / Timing Role: Acts as voltage-translating I/O hub between 3.3 V MCU and 1.8 V display/backlight subsystems. Use Value: Eliminates six discrete level shifters and simplifies layout; VIO ≥ VCC constraint ensures safe bidirectional signal integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar GPIO expansion and keypad interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TCA6424A | 24-bit I²C GPIO expander with no keypad controller or PWM; supports higher VIO (up to 5.5 V); lacks hibernate wake-up capability | Requires external keypad scan logic and PWM generation; better suited for general-purpose I/O expansion than UI-focused systems | Select when needing >16 GPIOs without keypad acceleration or ultra-low hibernate current |
| PCA9555 | 16-bit I²C expander with no keypad, PWM, or level translation; only 1.65–5.5 V VCC range; no hibernate mode or wake-up interrupt | Cannot replace STMPE1601's UI-specific features; suitable only for simple digital I/O extension with no power-aware operation | Select only for non-battery-powered systems where keypad/PWM/low-power features are irrelevant |
Compared with TCA6424A and PCA9555, the STMPE1601TBR uniquely integrates keypad scanning, hibernate wake-up, and LED PWM in a single 3×3 mm package - making it irreplaceable in space-constrained, battery-operated UI subsystems where those functions are mandatory.
Availability
STMPE1601TBR is available at Aetrix Electronics and suitable for smartphone UI subsystems, portable media player keypads, handheld game console interfaces, and industrial handheld terminals requiring stable component supply and long-term lifecycle support.
Supply support for STMPE1601TBR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, analog ICs, MEMS, and power management solutions for automotive, industrial, and consumer markets.
The STMPE (STMicroelectronics Port Expander) product line targets mobile and portable electronics, delivering highly integrated, low-power I/O expansion with application-specific accelerators like keypad scanning and LED control.
FAQ
What is the minimum pulse width required for RESET_N to ensure reliable reset?
The RESET_N pin requires an active-low pulse width of at least 20 µs to guarantee full register initialization and exit from hibernate mode. This specification is validated across the full operating temperature range (−40 °C to +85 °C) and both VCC supply conditions (1.8 V and 3.3 V). The pin is internally pulled up to VCC, so no external pull-up is needed unless driving from an open-drain source.
Can GPIO_13–GPIO_15 be used simultaneously as keypad inputs and I²C address pins?
No - GPIO_13–GPIO_15 sample their logic states only during power-on reset to configure the 7-bit I²C address (0x40–0x47); after reset, they function exclusively as GPIOs or keypad Y-lines. Using them for keypad operation post-reset is permitted, but doing so forfeits dynamic address reconfiguration and may increase leakage current if conflicting pull resistors are applied.
Does the STMPE1601TBR support automatic keypad debounce?
Yes - the hardware keypad controller includes built-in programmable debounce filtering with adjustable delay (0–127 ms in 1 ms steps) per key press/release event. This occurs entirely within the device, eliminating the need for host-side software debounce routines and reducing interrupt latency to under 100 µs for wake-up events.
What is the maximum sink current capability of the INT pin?
The INT pin is an open-drain output rated for 4 mA sink current at VCC = 1.8–3.3 V, as specified in Table 7 of the datasheet. It must be externally pulled up to VCC (or a compatible voltage ≤3.6 V); leaving it floating will prevent proper interrupt signaling. No internal pull-up is provided, and exceeding 4 mA risks latch-up or damage.
STMPE1601TBR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- Xpander Logic™
- Package/Case:
- 25-TFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Number of I/O:
- 16
- Interface:
- I2C
- Interrupt Output:
- Yes
- Features:
- Keypad Controller, POR, PWM
- Output Type:
- Open Drain
- Current - Output Source/Sink:
- 4mA
- Clock Frequency:
- 400 kHz
- Voltage - Supply:
- 1.65V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 25-TFBGA (3x3)
STMPE1601TBR FAQ
1.How can I place an order for STMPE1601TBR through Aetrix?
Please submit a Request for Quotation (RFQ) for STMPE1601TBR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STMPE1601TBR reliable?
The price and inventory of STMPE1601TBR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STMPE1601TBR is usually 5 days.
3.What payment methods are accepted for STMPE1601TBR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STMPE1601TBR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STMPE1601TBR?
STMPE1601TBR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STMPE1601TBR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STMPE1601TBR?
For technical support, including STMPE1601TBR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STMPE1601TBR requirements.
6.How does Aetrix verify that STMPE1601TBR is sourced from the original manufacturer or authorized distributors?
All STMPE1601TBR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STMPE1601TBR meets industry standards.
7.What is the process for return or replacement of STMPE1601TBR?
All STMPE1601TBR units undergo pre-shipment inspection (PSI). If there is an issue with STMPE1601TBR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STMPE1601TBR part is unused and in its original packaging.
Return procedure for STMPE1601TBR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STMPE1601TBR Tags

-
TCA6408ARSVR
Texas Instruments
-
TCA9535RTWR
Texas Instruments

-
FXL6408UMX
onsemi

-
PCF8574ADWR
Texas Instruments

-
PCF8574APWR
Texas Instruments

-
TCA9555PWR
Texas Instruments
-
TCA9554PWR
Texas Instruments
-
TCA9554APWR
Texas Instruments

-
TCA9539PWR
Texas Instruments
-
TCA9534PWR
Texas Instruments
-
TCA9555RTWR
Texas Instruments

-
TCA9535PWR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

