STMicroelectronics STPMS1BPQR
- Part No.:
- STPMS1BPQR
- Manufacturer:
- STMicroelectronics
- Category:
- Sensor and Detector Interfaces
- Package:
- 16-VFQFN Exposed Pad
- Datasheet:
-
STPMS1BPQR.pdf
- Description:
- IC SMART SENSOR ASSP W/PGA 16QFN
- Quantity:
- Payment:

- Shipping:

Inventory:331
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STPMS1BPQR from STMicroelectronics is a dual-channel, 1-bit, 2 MHz sigma-delta modulator with embedded programmable-gain amplifier (PGA), designed for precision AC watt-metering systems using Rogowski coils, current transformers, or shunts. It features two independent 1st-order ΣΔ modulators, chopper-stabilized low-noise/low-offset amplification (8× or 32× gain), and an internal 3 V LDO regulator. It operates from 3.2–5.5 V and delivers 11-bit effective resolution on current channel and 9-bit on voltage channel.
For engineers reviewing the STPMS1BPQR datasheet, STPMS1BPQR pinout, STPMS1BPQR application, or STPMS1BPQR equivalent, this device serves as a high-accuracy analog front-end for poly-phase energy metering ICs like STPMC1 - with critical focus on SNR (65 dB), THD (–80 dB), PSRR (0.1% AC/0.2% DC), and 30 ppm/°C reference stability.
Technical Context
The STPMS1BPQR integrates two independent analog signal chains: one for voltage sensing (VIP/VIN) with fixed ×4 gain and direct ΣΔ conversion, and one for current sensing (CIP/CIN) with configurable ×8 or ×32 gain via MS0 control and chopper-stabilized PGA. Each channel uses a first-order switched-capacitor integrator and comparator, driven by external clock (1.0–2.458 MHz) and internally generated phase-aligned timing signals.
Digital functionality includes a mode decoder (MS0/MS1) selecting gain and reference temperature coefficient (30–190 ppm/°C), a clock generator producing five synchronized analog clocks, and a time-multiplexed output stage delivering interleaved bitstreams on DAT/DATN. The 3 V LDO (VDD) powers both analog and digital sections and includes POR detection at 2.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Modulation Type | Two independent 1st-order sigma-delta modulators - enables simultaneous sampling of voltage and current channels without aliasing up to 2 kHz. |
| Sampling Clock Range | 1.0–2.458 MHz - supports flexible system clocking; nominal 2.048 MHz yields 65 dB SNR and –80 dB THD in current channel. |
| PGA Gain Options | 8× or 32× (via MS0) - matches wide dynamic range of shunt/CT/Rogowski sensors while preserving full-scale input headroom (±0.15 V @ 8×). |
| Reference Voltage | 1.23 V ±20 mV, 30 ppm/°C (typ.) - provides stable scaling for metrology-grade accuracy across industrial temperature range (–40 to +85 °C). |
| Effective Resolution | 11-bit (CIP-CIN), 9-bit (VIP-VIN) - validated by INL ≤ 0.35 LSB and DNL ≤ 0.2 LSB, enabling <0.1% energy measurement error. |
| PSRR (AC/DC) | 0.1% (50/60 Hz AC), 0.2% (DC) - suppresses supply ripple impact on metrology accuracy without external filtering. |
| Supply Range | VCC = 3.2–5.5 V - compatible with standard industrial rails; internal 3 V LDO (VDD) ensures clean analog/digital power separation. |
Pinout & Package
STPMS1BPQR is housed in a QFN16 (3 × 3 mm, 0.9 mm height) package with exposed thermal pad. Pin layout supports compact metering PCB design and thermal management in sealed enclosures.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VDD | +3.0 V regulated output | Internal LDO output - powers analog and digital sections; requires 100 nF decoupling to GND for noise suppression. |
| 2, 4, 16 GND | Signal and protection ground | Common reference for analog inputs, digital I/O, and ESD protection - must be low-impedance star-connected to minimize offset drift. |
| 5 CIP / 6 CIN | Current channel differential input | Accepts ±0.15 V (gain 8×) or ±0.035 V (gain 32×); high-impedance (240 kΩ) input enables direct CT/shunt interface with anti-aliasing filter. |
| 7 VIP / 8 VIN | Voltage channel differential input | Accepts ±0.3 V; 200–400 kΩ input impedance supports high-ratio resistive dividers for 110/230 VAC lines. |
| 11 MS0 / 12 MS1 | Configuration control inputs | Set PGA gain (MS0) and reference tempco (MS1) - TTL-compatible; pulled high internally, require no external bias. |
| 13 CLK | External sampling clock input | Drives all analog and digital timing; 40 ns latency from CLK edge to DAT output enables deterministic DSP synchronization. |
| 14 DAT / 15 DATN | Differential multiplexed bitstream output | Time-interleaved ΣΔ streams (bsV, bsC); differential signaling improves noise immunity in noisy metering environments. |
| 3 VDDac / 9 VDDav / 10 VDDd | Analog/digital supply inputs | Accept 3.0 V from internal LDO - decoupling required per datasheet to maintain PSRR and SNR performance. |
Key Features
| Feature | Design Value |
|---|---|
| Chopper-stabilized PGA | Reduces input offset to ±20 mV and 1/f noise - critical for DC-coupled current sensing in Class 0.2 energy meters. |
| Integrated 3 V LDO | Eliminates need for external regulator - simplifies BOM and improves supply rejection (38.1 °C/W RthJA enables operation at 85 °C ambient). |
| Configurable reference tempco | 30–190 ppm/°C selection via MS1 - allows trade-off between reference stability and calibration flexibility across temperature gradients. |
| Dual-channel time-multiplexed output | Single DAT/DATN pair reduces interconnect count vs. discrete ADCs - lowers EMI risk and PCB routing complexity in multi-sensor designs. |
| Anti-aliasing ready architecture | Input bandwidth limited to ~2 kHz - permits use of simple RC filters before CIP/CIN/VIP/VIN, avoiding costly active filters. |
Applications
| Smart Electricity Meters | Poly-phase Industrial Energy Monitors |
|---|---|
|
Use Scenario: Residential and commercial single/poly-phase meters compliant with IEC 62053-21 Class 0.2 accuracy requirements. IC Role / Device Role / Timing Role: Analog front-end modulator - digitizes voltage and current simultaneously at 2.048 MHz, feeding bitstream to STPMC1 for digital filtering and energy calculation. Use Value: Achieves 65 dB SNR and <0.1% gain error over –40 to +85 °C - meets long-term metrological stability without periodic recalibration. |
Use Scenario: Factory-floor energy monitoring systems tracking real-time kW/kWh consumption across multiple 3-phase loads. IC Role / Device Role / Timing Role: Dual-channel sensor interface - supports parallel acquisition from three STPMS1BPQR devices (one per phase) synchronized via shared CLK. Use Value: Time-multiplexed DAT/DATN outputs reduce FPGA I/O count by 50% vs. parallel ADCs - accelerates firmware development and lowers system cost. |
| Motor Drive Current Feedback | Industrial Weight Scale Signal Conditioning |
|
Use Scenario: Closed-loop vector-controlled inverters requiring precise phase current measurement for torque regulation. IC Role / Device Role / Timing Role: High-bandwidth current channel modulator - interfaces directly to shunt resistor, providing 11-bit resolution at 2 kHz update rate. Use Value: Chopper-stabilized PGA eliminates DC offset drift during thermal cycling - maintains <1% current measurement error across motor startup/stall conditions. |
Use Scenario: Platform scales and hopper load cells measuring static and quasi-static weight in process control environments. IC Role / Device Role / Timing Role: Low-drift voltage channel conditioner - digitizes bridge output (VIP/VIN) with 9-bit effective resolution and 0.5 LSB INL. Use Value: 30 ppm/°C reference and 0.05 LSB offset error enable <0.01% linearity over 0–50 °C - satisfies OIML R76 Class III requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar sigma-delta modulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7403BRIZ-RL7 | Single-channel, 16-bit isolation-capable modulator; no integrated PGA or LDO; requires external 5 V supply and reference. | Used in isolated inverter current sensing where galvanic separation is mandatory; lacks dual-channel capability for voltage+current metering. | Select when safety isolation is required and system already provides precision reference and clean 5 V rail. |
| AMC1304M05DWR | Isolated delta-sigma modulator with integrated transformer; 20-bit resolution but fixed 5 V input range; no gain configuration. | Targeted at high-voltage motor drives and solar inverters needing reinforced isolation; not optimized for low-cost metering with shunt/CT sensors. | Choose for >5 kVRMS isolation compliance and ultra-high resolution, accepting higher BOM cost and no PGA flexibility. |
Compared with AD7403BRIZ-RL7 and AMC1304M05DWR, STPMS1BPQR uniquely integrates dual-channel modulation, chopper-stabilized PGA, and 3 V LDO in QFN16 - reducing component count and calibration effort specifically for non-isolated, cost-sensitive energy metering and industrial sensing.
Availability
STPMS1BPQR is available at Aetrix Electronics and suitable for smart electricity meters, poly-phase industrial energy monitors, motor drive current feedback, and industrial weight scale signal conditioning requiring stable component supply and long-term metrological consistency.
Supply support for STPMS1BPQR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in microcontrollers, power management, analog ICs, and automotive semiconductors - with over 40 years of metrology IP development.
STPMS1BPQR belongs to ST's Smart Power Metering Solutions product line, engineered specifically for high-accuracy, low-cost, and thermally robust AC energy measurement in utility-grade and industrial-grade metering systems.
FAQ
What is the maximum recommended clock frequency for STPMS1BPQR, and how does it affect performance?
The absolute maximum clock frequency is 2.458 MHz per datasheet Table 5. Operating at 2.048 MHz delivers optimal AC measurement accuracy: 65 dB SNR and –80 dB THD in the current channel. Exceeding 2.458 MHz risks timing violation in the digital multiplexer and degraded PSRR due to reduced charge-transfer margin in the ΣΔ integrators.
Can STPMS1BPQR operate without an external anti-aliasing filter?
No - an external RC anti-aliasing filter is mandatory before CIP/CIN and VIP/VIN inputs. The device's analog input bandwidth extends beyond 2 kHz, and unfiltered 50/60 Hz harmonics or switching noise can alias into the baseband. ST recommends 10 kHz cutoff filters matched to the 2.048 MHz clock for Class 0.2 metering compliance.
How does the MS1 pin affect reference stability, and what is the trade-off?
MS1 selects the band-gap reference temperature coefficient: 0 = 30 ppm/°C (high stability), 1 = 190 ppm/°C (higher sensitivity). Lower tempco improves long-term accuracy across temperature swings but reduces reference output voltage variation usable for self-calibration routines - critical in field-deployed meters with infrequent maintenance.
Is the VDD pin intended for external load connection, or only for local decoupling?
VDD is the output of the internal 3 V LDO and is rated for ≤10 mA total load (analog + digital sections). It must not power external circuitry - doing so causes LDO droop, degrading reference stability and increasing INL/DNL. Only 100 nF ceramic decoupling to GND is permitted per datasheet Figure 17.
STPMS1BPQR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- 16-VFQFN Exposed Pad
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Not For New Designs
- Programmable:
- Not Verified
- Type:
- Smart Sensor
- Input Type:
- Analog
- Output Type:
- Digital
- Current - Supply:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (3x3)
STPMS1BPQR FAQ
1.How can I place an order for STPMS1BPQR through Aetrix?
Please submit a Request for Quotation (RFQ) for STPMS1BPQR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STPMS1BPQR reliable?
The price and inventory of STPMS1BPQR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STPMS1BPQR is usually 5 days.
3.What payment methods are accepted for STPMS1BPQR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STPMS1BPQR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STPMS1BPQR?
STPMS1BPQR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STPMS1BPQR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STPMS1BPQR?
For technical support, including STPMS1BPQR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STPMS1BPQR requirements.
6.How does Aetrix verify that STPMS1BPQR is sourced from the original manufacturer or authorized distributors?
All STPMS1BPQR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STPMS1BPQR meets industry standards.
7.What is the process for return or replacement of STPMS1BPQR?
All STPMS1BPQR units undergo pre-shipment inspection (PSI). If there is an issue with STPMS1BPQR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STPMS1BPQR part is unused and in its original packaging.
Return procedure for STPMS1BPQR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STPMS1BPQR Tags

-
RE46C100S8TF
Microchip Technology

-
XTR111AIDRCR
Texas Instruments

-
XTR111AIDGQR
Texas Instruments
-
XTR117AIDGKR
Texas Instruments

-
XTR111AIDGQT
Texas Instruments

-
XTR115UA/2K5
Texas Instruments

-
MAX14626ETT+T
Analog Devices Inc./Maxim Integrated

-
XTR116UA/2K5
Texas Instruments

-
XTR115U/2K5
Texas Instruments

-
XTR116U/2K5
Texas Instruments
-
PGA308AIDGSR
Texas Instruments

-
XTR300AIRGWR
Texas Instruments
Tech Hub
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

