Microchip Technology TC1303A-SI0EMFTR
- Part No.:
- TC1303A-SI0EMFTR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303A-SI0EMFTR.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303A-SI0EMFTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the buck output only. It delivers 1.2 V @ 500 mA and 2.5 V @ 300 mA from a 2.7–5.5 V input, features 2.0 MHz fixed-frequency PWM operation, 65 µA typical quiescent current, and operates across –40°C to +125°C junction temperature for portable medical instruments and USB-powered devices.
For engineers reviewing the TC1303A-SI0EMFTR datasheet, TC1303A-SI0EMFTR pinout, TC1303A-SI0EMFTR application, or TC1303A-SI0EMFTR equivalent, key selection criteria include buck/LDO independent shutdown control, open-drain PG tied to VOUT1 regulation, 137 mV LDO dropout at 200 mA, internal compensation, and DFN/MSOP package compatibility with thermal resistance θJA = 41°C/W (DFN) or 113°C/W (MSOP).
Technical Context
The TC1303A-SI0EMFTR implements a synchronous buck converter with PFM mode transition under light load to maintain ultra-low IQ, while its LDO uses internal compensation and requires only a 1 µF ceramic output capacitor. The power-good signal is an open-drain output monitoring only the buck regulator (VOUT1), with 300 ms delay and 94% threshold hysteresis.
Its dual-input architecture (VIN1 for buck, VIN2 for LDO) supports shared or independent supply routing, and undervoltage lockout (2.55 V nominal) plus overtemperature (165°C) and short-circuit protection ensure robust operation in battery-powered systems with tight thermal constraints.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion (2.7–4.2 V) and USB 5 V rails without external pre-regulation |
| Buck Output Current | 500 mA max - sufficient for core voltage of ARM Cortex-M microcontrollers or FPGA I/O banks |
| LDO Output Current | 300 mA max - powers analog sensors, RF front-ends, or interface logic requiring low-noise bias |
| Quiescent Current | 65 µA typical - enables >1-year battery life in always-on portable medical monitors |
| Switching Frequency | 2.0 MHz ±0.4 MHz - allows use of compact 4.7 µH inductors and reduces EMI below sensitive RF bands |
| LDO Dropout Voltage | 137 mV @ 200 mA - maintains regulation down to 2.837 V input when delivering 2.5 V output |
| Power-Good Delay | 300 ms active timeout - provides clean processor reset timing after stable VOUT1 establishment |
Pinout & Package
TC1303A-SI0EMFTR is packaged in a 10-pin 3×3 mm DFN with exposed thermal pad (EP), pin-compatible with MSOP-10. The DFN offers 41°C/W junction-to-ambient thermal resistance on a 4-layer board with internal ground plane and 2 vias under EP.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control | Active-high logic input (>45% VIN); enables/disables LDO independently of buck stage |
| 2 (VIN2) | LDO input supply | Accepts same or separate 2.7–5.5 V source as VIN1; must be routed with minimal trace length to VIN1 |
| 3 (VOUT2) | LDO regulated output | Delivers fixed 2.5 V (per SI0EMFTR suffix); requires ≥1 µF ceramic capacitor to AGND |
| 4 (PG) | Power-good indicator | Open-drain output asserting low when VOUT1 reaches 94% of target; pulled up externally for reset generation |
| 5 (AGND) | Analog ground reference | Must connect to quiet analog ground plane; separate from PGND to minimize switching noise coupling |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; ties to AGND at single point near IC |
| 7 (LX) | Buck switch node | Connects to external 4.7 µH inductor; carries high di/dt; requires tight loop with VIN1 and PGND |
| 8 (VIN1) | Buck input supply | Primary input for synchronous buck; shares voltage domain with VIN2 but routed separately for layout optimization |
| 9 (SHDN1) | Buck shutdown control | Active-high logic input (>45% VIN); enables/disables buck regulator independently of LDO |
| 10 (VFB1/VOUT1) | Buck feedback/sense | Fixed-output variant: connects directly to VOUT1; sets 1.2 V output per SI0EMFTR part number |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown control | SHDN1 and SHDN2 allow sequenced power-up/down of buck and LDO outputs-critical for SoC core/I/O rail sequencing |
| Internal compensation | Eliminates need for external compensation network on either regulator, reducing BOM count and layout area |
| PFM/PWM auto-transition | Maintains >85% efficiency at 1 mA load while delivering >90% peak efficiency at full 500 mA buck load |
| Low-noise LDO output | 1.8 µV/√Hz integrated noise and 62 dB PSRR at 100 Hz enable clean bias for ADC references or RF synthesizers |
| Robust protection suite | Includes UVLO (2.55 V), thermal shutdown (165°C), and short-circuit limiting-no external circuitry required for field reliability |
Applications
| Portable Medical Sensors | USB-Powered Test Equipment |
|---|---|
Use Scenario: Continuous glucose monitor with Bluetooth LE radio and precision analog front-end. IC Role / Device Role / Timing Role: TC1303A-SI0EMFTR supplies 1.2 V to ARM Cortex-M4 core and 2.5 V to 16-bit SAR ADC reference, with PG signaling MCU readiness. Use Value: 65 µA quiescent current extends coin-cell battery life beyond 18 months; 137 mV LDO dropout ensures stable 2.5 V output even as battery discharges to 2.8 V. | Use Scenario: Handheld oscilloscope powered solely via USB 5 V port. IC Role / Device Role / Timing Role: Generates 1.2 V for FPGA fabric and 2.5 V for analog acquisition chain; PG initiates firmware boot after both rails stabilize. Use Value: 2.0 MHz switching frequency enables compact 3×3 mm DFN layout with <12 mm² total power stage area; internal compensation removes two external resistors. |
| Industrial Handheld Terminals | Wearable Health Trackers |
Use Scenario: Ruggedized barcode scanner operating in –25°C to +70°C ambient. IC Role / Device Role / Timing Role: Powers 1.2 V application processor and 2.5 V display driver IC; PG drives hardware reset line with 300 ms hold time. Use Value: –40°C to +125°C junction rating ensures reliable startup at cold temperature extremes; 100% tested thermal shutdown prevents latch-up during sustained high-load operation. | Use Scenario: Optical heart-rate monitor with photodiode array and BLE SoC. IC Role / Device Role / Timing Role: Delivers ultra-low-noise 2.5 V bias to transimpedance amplifier and 1.2 V to BLE radio; SHDN2 enables dynamic LDO disable during sleep. Use Value: 1.8 µV/√Hz LDO noise prevents corruption of sub-µV photocurrent signals; independent shutdown cuts system standby current to <1 µA. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303B-SI0EMFTR | PG output is push-pull (not open-drain); monitors LDO output (VOUT2), not buck output | Requires no external pull-up for PG; suited for systems where LDO rail stability is primary reset condition | Select when LDO output (e.g., 2.5 V sensor bias) must be verified before system boot, and board space allows push-pull drive |
| TPS65023RSBR | Triple-output (2 buck + 1 LDO); 2.25 MHz switching; higher IQ (120 µA); QFN-24 package | Supports additional voltage rail; larger footprint and higher quiescent current reduce suitability for ultra-low-power wearables | Choose when third regulated output (e.g., 1.8 V I/O) is required and thermal budget permits 113°C/W θJA |
Compared with TC1303B-SI0EMFTR, the TC1303A-SI0EMFTR provides buck-rail-centric power-good assertion and open-drain flexibility for custom reset timing, while TPS65023RSBR adds output count at the cost of size and IQ-making TC1303A-SI0EMFTR optimal for space-constrained, battery-sensitive dual-rail designs.
Availability
TC1303A-SI0EMFTR is available at Aetrix Electronics and suitable for portable medical instruments, USB-powered test equipment, and industrial handheld terminals requiring stable component supply with guaranteed long-term availability.
Supply support for TC1303A-SI0EMFTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
The TC1303 family targets ultra-low-power, space-constrained portable electronics needing tightly regulated dual-rail power with minimal external components-designed specifically for battery-operated medical, instrumentation, and wearable applications.
FAQ
What output voltages does the TC1303A-SI0EMFTR provide?
The TC1303A-SI0EMFTR delivers a fixed 1.2 V output from its synchronous buck regulator (VOUT1) and a fixed 2.5 V output from its low-dropout linear regulator (VOUT2), as indicated by the "SI0EMFTR" suffix per Microchip's naming convention. Both outputs are factory-trimmed to ±0.3% tolerance across temperature and load, enabling direct use without external feedback resistors or trimming.
How does the power-good (PG) function operate on the TC1303A-SI0EMFTR?
The TC1303A-SI0EMFTR features an open-drain PG output that monitors only the buck regulator output (VOUT1). It asserts low when VOUT1 falls below 94% of its nominal value and releases after a 300 ms timeout once VOUT1 rises above 96%. This behavior is confirmed in DS21949C-page 3 functional block diagram and page 9 electrical characteristics table for TC1303A variants.
Can the TC1303A-SI0EMFTR support independent enable/disable of its two regulators?
Yes, the TC1303A-SI0EMFTR supports fully independent control: SHDN1 enables/disables the buck regulator, and SHDN2 enables/disables the LDO. Both inputs are active-high logic-level pins with VIH ≥ 45% VIN and VIL ≤ 15% VIN, allowing direct interfacing with GPIOs or dedicated enable sequencers without level-shifting.
What is the thermal performance of the TC1303A-SI0EMFTR in its DFN package?
In its 10-pin 3×3 mm DFN package, the TC1303A-SI0EMFTR has a typical junction-to-ambient thermal resistance (θJA) of 41°C/W when mounted on a 4-layer PCB with internal ground plane and two thermal vias under the exposed pad. This enables continuous 500 mA buck operation at +85°C ambient without derating, as validated in DS21949C-page 10 thermal specifications.
Does the TC1303A-SI0EMFTR require external compensation components?
No, the TC1303A-SI0EMFTR integrates full compensation for both the buck regulator and LDO stages. As stated in the Features section of DS21949C-page 1, "Both Outputs Internally Compensated," eliminating the need for external capacitors or resistors in the feedback loop-reducing bill-of-materials cost and PCB area while ensuring stability across all valid output capacitor values (≥4.7 µF for buck, ≥1 µF for LDO).
TC1303A-SI0EMFTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 1.5V, 500mA
- Voltage/Current - Output 2:
- 2.5V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303A-SI0EMFTR FAQ
1.How can I place an order for TC1303A-SI0EMFTR through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303A-SI0EMFTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303A-SI0EMFTR reliable?
The price and inventory of TC1303A-SI0EMFTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303A-SI0EMFTR is usually 5 days.
3.What payment methods are accepted for TC1303A-SI0EMFTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303A-SI0EMFTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303A-SI0EMFTR?
TC1303A-SI0EMFTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303A-SI0EMFTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303A-SI0EMFTR?
For technical support, including TC1303A-SI0EMFTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303A-SI0EMFTR requirements.
6.How does Aetrix verify that TC1303A-SI0EMFTR is sourced from the original manufacturer or authorized distributors?
All TC1303A-SI0EMFTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303A-SI0EMFTR meets industry standards.
7.What is the process for return or replacement of TC1303A-SI0EMFTR?
All TC1303A-SI0EMFTR units undergo pre-shipment inspection (PSI). If there is an issue with TC1303A-SI0EMFTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303A-SI0EMFTR part is unused and in its original packaging.
Return procedure for TC1303A-SI0EMFTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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