Microchip Technology TC1303A-UA0EMFTR
- Part No.:
- TC1303A-UA0EMFTR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303A-UA0EMFTR.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303A-UA0EMFTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the buck output only. It delivers 1.2V @ 500 mA and 2.5V @ 300 mA from a 2.7–5.5V input, features 65 µA typical quiescent current, 2.0 MHz fixed-frequency PWM operation, and operates across –40°C to +125°C junction temperature. It targets portable computing and USB-powered devices requiring tightly regulated dual-rail supplies.
For engineers reviewing the TC1303A-UA0EMFTR datasheet, TC1303A-UA0EMFTR pinout, TC1303A-UA0EMFTR application, or TC1303A-UA0EMFTR equivalent, key selection criteria include buck/LDO independent shutdown control, 137 mV LDO dropout at 200 mA, open-drain PG output tied to VOUT1 regulation, 3x3 mm 10-pin DFN package, and compatibility with ceramic output capacitors as small as 1 µF for the LDO.
Technical Context
The TC1303A-UA0EMFTR implements a synchronous buck converter with automatic transition between PWM (heavy load) and PFM (light load) modes to maintain high efficiency (>90% typical at full load) while minimizing quiescent current. Its internal compensation eliminates external loop components, and the 2.0 MHz switching frequency enables compact filter design using a 4.7 µH inductor and 4.7 µF output capacitor.
The integrated 300 mA LDO features ultra-low dropout (137 mV typical @ 200 mA), ±0.3% output voltage tolerance, and 62 dB PSRR at ≤100 Hz. Its power-good signal monitors only the buck output (VOUT1), asserts after a 300 ms delay upon regulation, and is implemented as an open-drain output - distinct from TC1303B (push-pull) and TC1303C/TC1304 (dual-output monitoring).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion (2.7–4.2 V) and USB 5 V rails without external pre-regulation. |
| Buck Output Current | 500 mA maximum - sufficient for core logic or microcontroller VDD supply in portable systems. |
| LDO Output Current | 300 mA maximum - powers I/O peripherals, sensors, or RF sections with low-noise bias. |
| Quiescent Current | 65 µA typical - enables >1-year battery life in always-on standby applications with light loads. |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - allows operation down to ~2.8 V input when regulating 2.5 V output. |
| Switching Frequency | 2.0 MHz fixed - permits use of miniature 4.7 µH inductors and reduces EMI fundamental frequency. |
| Power-Good Delay | 300 ms - provides stable reset timing for processors requiring guaranteed post-power-up hold-off. |
Pinout & Package
TC1303A-UA0EMFTR is housed in a thermally enhanced 10-pin 3×3 mm DFN package with exposed pad (EP) connected to AGND. The package supports high-power-density layouts and achieves θJA = 41°C/W on a 4-layer board with thermal vias.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | SHDN2 | Active-low enable for LDO only; logic-low (<15% VIN) disables VOUT2 independently of buck stage. |
| 2 | VIN2 | Dedicated analog input for LDO; must be short-traced to VIN1 to minimize noise coupling into LDO path. |
| 3 | VOUT2 | 300 mA LDO output; requires ≥1 µF ceramic capacitor to AGND for stability and transient response. |
| 4 | PG | Open-drain power-good output monitoring VOUT1 only; requires external pull-up to system rail. |
| 5 | AGND | Analog ground reference; must be isolated from noisy digital/power grounds and tied to EP. |
| 6 | PGND | Power ground return for buck switch node; separate from AGND to prevent switching noise injection. |
| 7 | LX | Buck switch node; connects to external inductor and catch diode (integrated FETs); high dv/dt node. |
| 8 | VIN1 | Main input for buck regulator; shared with VIN2 via short PCB trace per layout guidelines. |
| 9 | SHDN1 | Active-low enable for buck regulator only; allows independent sequencing of VOUT1 before VOUT2. |
| 10 | VFB1/VOUT1 | Feedback input for adjustable VOUT1 or direct connection point for fixed-output versions (e.g., 1.2 V). |
Key Features
| Feature | Design Value |
|---|---|
| Independent buck/LDO shutdown | Enables precise power sequencing: VOUT1 can be enabled before VOUT2, or either rail disabled individually for dynamic power management. |
| Internally compensated buck | Eliminates need for external compensation network - reduces BOM count and layout sensitivity while maintaining stability over load/temperature. |
| Low-noise LDO with 1 µF capacitor | Minimizes board area and cost; avoids large tantalum or electrolytic capacitors while delivering <1.8 µV/√Hz output noise. |
| 2.0 MHz fixed-frequency PWM | Enables use of sub-5 mm inductors and reduces size of input/output filtering; improves transient response vs. lower-frequency alternatives. |
| Open-drain PG tied to VOUT1 | Provides processor reset timing aligned with main core supply stabilization - critical for reliable boot in embedded systems. |
Applications
| Portable Medical Instrumentation | USB-Powered Peripheral |
|---|---|
|
Use Scenario: Handheld glucose meter with ARM Cortex-M0+ MCU and analog front-end sensor interface. IC Role / Device Role / Timing Role: Supplies 1.2 V core voltage (VOUT1) to MCU and 2.5 V bias (VOUT2) to precision ADC reference and op-amps. Use Value: 65 µA quiescent current extends battery life; 137 mV LDO dropout ensures operation down to 2.8 V battery voltage. |
Use Scenario: USB-C powered Bluetooth audio dongle requiring clean 3.3 V I/O and 1.8 V digital core. IC Role / Device Role / Timing Role: Generates dual rails from 5 V USB input; PG signal resets Bluetooth SoC after VOUT1 stabilizes. Use Value: 2.0 MHz switching minimizes conducted EMI near sensitive RF bands; open-drain PG simplifies reset circuit integration. |
| Industrial Handheld Terminal | Wearable Health Monitor |
|
Use Scenario: Ruggedized barcode scanner with LCD display, imager, and wireless comms operating from 3.7 V Li-ion. IC Role / Device Role / Timing Role: Delivers 1.2 V to application processor and 3.3 V to display driver and transceiver; SHDN1/SHDN2 enable selective subsystem sleep. Use Value: –40°C to +125°C rating ensures reliability in outdoor environments; independent shutdown cuts leakage during idle states. |
Use Scenario: Continuous ECG patch with ultra-low-power MCU and analog signal chain powered by coin cell. IC Role / Device Role / Timing Role: Provides 1.8 V digital domain and 2.5 V analog reference from boosted 3.0 V rail; PFM mode maintains µA-level IQ during sensor sampling intervals. Use Value: Automatic PWM-to-PFM transition reduces average current draw by >50% vs. fixed-frequency operation at light loads. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303B-VA0EMFTR | Power-good output monitors LDO (VOUT2) instead of buck (VOUT1); push-pull PG output. | Suitable where system reset must align with auxiliary rail stabilization (e.g., FPGA configuration voltage). | Select when primary reset dependency is on VOUT2 rather than VOUT1 - no PCB changes required if PG pull-up and routing accommodate push-pull drive. |
| TPS65023RGZR | Triple-output PMIC (2 buck + 1 LDO); higher IQ (80 µA); 2.25 MHz switching; I2C programmability. | Supports more complex sequencing and voltage adjustment; requires firmware integration and additional board space. | Choose when system demands >2 rails or dynamic voltage scaling; not drop-in due to different pinout, control interface, and footprint. |
Compared with TC1303B-VA0EMFTR, TC1303A-UA0EMFTR offers earlier reset assertion aligned with core supply readiness; compared with TPS65023RGZR, it provides simpler integration, lower cost, and smaller footprint for fixed dual-rail designs without programmability needs.
Availability
TC1303A-UA0EMFTR is available at Aetrix Electronics and suitable for portable medical instrumentation, USB-powered peripherals, and industrial handheld terminals requiring stable component supply, long-term lifecycle support, and automotive-grade temperature resilience.
Supply support for TC1303A-UA0EMFTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog, and power management solutions for embedded and industrial markets.
The TC1303 family was designed specifically for space-constrained, battery-operated devices needing efficient dual-rail generation with minimal external components and robust thermal performance.
FAQ
What is the function of the PG pin on the TC1303A-UA0EMFTR?
The PG (Power-Good) pin on the TC1303A-UA0EMFTR is an open-drain output that signals when the buck regulator output (VOUT1) reaches and maintains regulation within 94% of its target voltage. It asserts after a fixed 300 ms delay and is intended for processor reset synchronization. Because it is open-drain, TC1303A-UA0EMFTR requires an external pull-up resistor to a compatible voltage rail - unlike TC1303B which uses a push-pull PG output.
Can the TC1303A-UA0EMFTR generate adjustable output voltages?
Yes, the TC1303A-UA0EMFTR supports adjustable VOUT1 via the VFB1 pin: connecting a resistive divider between VOUT1 and AGND sets the output voltage from 0.8 V to 4.5 V. The feedback reference voltage is tightly regulated at 0.8 V ±2.5%. VOUT2 is fixed at factory-set values (e.g., 1.5 V, 1.8 V, 2.5 V, or 3.3 V); TC1303A-UA0EMFTR specifically delivers 1.2 V on VOUT1 and 2.5 V on VOUT2 as indicated by its part number suffix.
What thermal performance can be expected from the TC1303A-UA0EMFTR in a 3x3 mm DFN package?
In a standard 4-layer PCB with internal ground plane and two thermal vias under the exposed pad, the TC1303A-UA0EMFTR achieves a junction-to-ambient thermal resistance (θJA) of 41°C/W. This allows continuous 500 mA buck output at ambient temperatures up to +85°C when dissipating ≤0.5 W - verified by its rated –40°C to +125°C operating junction temperature range and integrated overtemperature protection that triggers at 165°C.
How does the TC1303A-UA0EMFTR manage efficiency across varying load conditions?
The TC1303A-UA0EMFTR automatically transitions between PWM mode (at heavy loads) and PFM mode (at light loads) to sustain high efficiency across the full 0–500 mA range. At 500 mA and 3.3 V output, typical efficiency exceeds 90%; at 1 mA, PFM operation reduces quiescent current to 65 µA. This behavior is fully internal - no external control or mode-select pins are required for seamless, load-dependent optimization.
Is the TC1303A-UA0EMFTR pin-compatible with other members of the TC1303 family?
Yes, all TC1303 variants (A, B, C) and TC1304 share identical 10-pin DFN and MSOP footprints and pinouts, including TC1303A-UA0EMFTR. However, functional differences exist: TC1303A-UA0EMFTR monitors only VOUT1 for PG, TC1303B monitors only VOUT2, and TC1303C/TC1304 monitor both. Substituting variants requires verifying PG logic, shutdown behavior, and output voltage configurations - but no PCB redesign is needed.
TC1303A-UA0EMFTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 1.3V, 500mA
- Voltage/Current - Output 2:
- 3.3V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303A-UA0EMFTR FAQ
1.How can I place an order for TC1303A-UA0EMFTR through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303A-UA0EMFTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303A-UA0EMFTR reliable?
The price and inventory of TC1303A-UA0EMFTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303A-UA0EMFTR is usually 5 days.
3.What payment methods are accepted for TC1303A-UA0EMFTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303A-UA0EMFTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303A-UA0EMFTR?
TC1303A-UA0EMFTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303A-UA0EMFTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303A-UA0EMFTR?
For technical support, including TC1303A-UA0EMFTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303A-UA0EMFTR requirements.
6.How does Aetrix verify that TC1303A-UA0EMFTR is sourced from the original manufacturer or authorized distributors?
All TC1303A-UA0EMFTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303A-UA0EMFTR meets industry standards.
7.What is the process for return or replacement of TC1303A-UA0EMFTR?
All TC1303A-UA0EMFTR units undergo pre-shipment inspection (PSI). If there is an issue with TC1303A-UA0EMFTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303A-UA0EMFTR part is unused and in its original packaging.
Return procedure for TC1303A-UA0EMFTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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