Microchip Technology TC1303A-ZA0EMF
- Part No.:
- TC1303A-ZA0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303A-ZA0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303A-ZA0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the buck output only. It delivers 1.2V @ 500 mA and 2.5V @ 300 mA from a 2.7–5.5V input, achieves >90% efficiency at 2.0 MHz switching frequency, and operates across –40°C to +125°C for portable medical instruments and USB-powered devices.
For engineers reviewing the TC1303A-ZA0EMF datasheet, TC1303A-ZA0EMF pinout, TC1303A-ZA0EMF application, or TC1303A-ZA0EMF equivalent, key selection criteria include its buck-only power-good function, independent shutdown control per rail, 65 µA typical quiescent current, 137 mV LDO dropout at 200 mA, and compatibility with 1 µF ceramic output capacitors on both outputs.
Technical Context
The TC1303A-ZA0EMF implements a fixed-frequency 2.0 MHz PWM buck stage with automatic transition to PFM mode under light load to minimize IQ, while the LDO uses internal compensation and requires no external components beyond a single 1 µF output capacitor. Its PG output is open-drain and monitors only VOUT1 regulation with 94% threshold and 300 ms delay.
Shutdown logic is independent: SHDN1 controls the buck regulator, SHDN2 controls the LDO, and both inputs accept standard CMOS thresholds (VIH ≥ 45% VIN, VIL ≤ 15% VIN). Protection includes undervoltage lockout (2.55V nominal), overtemperature shutdown (165°C), and short-circuit current limiting on both outputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 500 mA maximum - supports core voltage rails for low-power processors and microcontrollers |
| LDO Output Current | 300 mA maximum - powers I/O, sensors, or analog circuitry requiring low-noise bias |
| Quiescent Current | 65 µA typical - enables multi-day battery life in always-on portable applications |
| Switching Frequency | 2.0 MHz fixed - allows use of compact 4.7 µH inductors and reduces EMI filtering burden |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - permits operation from 2.7V input to deliver 2.5V output with margin |
| Power-Good Delay | 300 ms - provides stable reset timing for embedded processors after power-up |
| Operating Temperature | –40°C to +125°C junction - qualified for industrial and automotive cabin-adjacent environments |
Pinout & Package
TC1303A-ZA0EMF is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP) connected to AGND. Pin numbering follows standard DFN orientation (pin 1 top-left, counterclockwise).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control input | Active-high logic input; enables/disables 300 mA LDO independently of buck regulator |
| 2 (VIN2) | LDO input supply | Accepts 2.7–5.5V; must be tied closely to VIN1 to minimize noise coupling into LDO path |
| 3 (VOUT2) | LDO regulated output | Delivers fixed 2.5V (per -ZA0 suffix); requires ≥1 µF ceramic capacitor to AGND |
| 4 (PG) | Power-good indicator | Open-drain output asserting when VOUT1 reaches 94% of target; pulled up externally for reset generation |
| 5 (AGND) | Analog ground reference | Must be connected to clean analog ground plane; separate from PGND to reduce switching noise injection |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; routed separately from AGND to avoid ground bounce |
| 7 (LX) | Buck switch node | Connects to external 4.7 µH inductor; carries high di/dt; requires tight layout and Kelvin connection |
| 8 (VIN1) | Buck input supply | Accepts 2.7–5.5V; shared with VIN2 via short trace; decoupled with 4.7 µF ceramic capacitor |
| 9 (SHDN1) | Buck shutdown control input | Active-high logic input; enables/disables 500 mA buck regulator independently of LDO |
| 10 (VFB1/VOUT1) | Buck feedback/sense | Configured as VOUT1 for fixed-output variants (-ZA0); connects directly to 1.2V output node |
Key Features
| Feature | Design Value |
|---|---|
| Independent dual-rail shutdown | Enables precise power sequencing: buck and LDO can be enabled/disabled separately for system-level control |
| Internally compensated LDO | Eliminates need for external compensation network; reduces BOM count and layout area by requiring only one 1 µF output cap |
| Automatic PWM-to-PFM mode transition | Maintains high efficiency (>85%) down to 1 mA load without manual mode control or external circuitry |
| Buck-only power-good monitoring | PG asserts only when VOUT1 (1.2V) is in regulation - ideal for systems where processor core voltage dictates system readiness |
| Low-noise LDO output | 1.8 µV/√Hz output noise and 62 dB PSRR below 100 Hz enable clean analog supply for ADCs and sensors |
Applications
| Portable Medical Instrumentation | USB-Powered Test Equipment |
|---|---|
Use Scenario: Battery-operated glucose meter with ARM Cortex-M0+ MCU and precision analog front-end. IC Role / Device Role / Timing Role: Provides 1.2V core voltage (buck) and 2.5V reference/ADC bias (LDO); PG signal resets MCU until core rail is stable. Use Value: 65 µA quiescent current extends coin-cell life; 137 mV LDO dropout enables full 2.5V output from 2.7V minimum battery voltage. | Use Scenario: Handheld oscilloscope powered solely from USB 5V bus. IC Role / Device Role / Timing Role: Generates 1.2V for FPGA fabric and 2.5V for ADC reference; PG delay ensures FPGA configuration completes before release from reset. Use Value: 2.0 MHz switching allows miniature 4.7 µH inductor; DFN package fits tight board space; no external LDO compensation saves PCB area. |
| Industrial Handheld Terminal | Low-Power IoT Sensor Node |
Use Scenario: Ruggedized barcode scanner with display backlight and wireless BLE module. IC Role / Device Role / Timing Role: Supplies 1.2V to application processor and 2.5V to display driver IC; independent SHDN pins allow dynamic rail gating during sleep modes. Use Value: –40°C to +125°C rating ensures reliability in warehouse environments; UVLO prevents brownout operation during battery sag. | Use Scenario: Battery-powered environmental sensor node transmitting temperature/humidity via LoRaWAN. IC Role / Device Role / Timing Role: Powers ultra-low-power MCU (1.2V) and analog sensor interface (2.5V); PG signal triggers wake-up interrupt upon power stabilization. Use Value: 300 mA LDO supports burst-mode sensor excitation; 1 µF output caps minimize footprint for long-life primary lithium cells. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303B-ZA0EMF | PG monitors LDO output (VOUT2) instead of buck output; same pinout and electrical specs otherwise | Suitable when system readiness depends on auxiliary rail stability (e.g., sensor bias) rather than processor core voltage | Select TC1303B-ZA0EMF if power-good assertion must reflect 2.5V LDO regulation, not 1.2V buck regulation |
| TPS62231DRYT | Single-output 600 mA buck only; no integrated LDO or PG; 2.25 MHz switching; 17 µA IQ | Requires external LDO and reset supervisor for dual-rail, PG-enabled designs | Choose TPS62231DRYT only when LDO and PG functions are implemented separately for higher flexibility or lower cost in high-volume production |
Compared with TC1303B-ZA0EMF, TC1303A-ZA0EMF provides earlier system readiness indication by tying PG to the critical processor core rail; versus TPS62231DRYT, it eliminates two external ICs but trades off programmability and ultra-low IQ for integration and guaranteed sequencing behavior.
Availability
TC1303A-ZA0EMF is available at Aetrix Electronics and suitable for portable medical instrumentation, USB-powered test equipment, and industrial handheld terminals requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for TC1303A-ZA0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
The TC1303 family was designed specifically for space-constrained, battery-sensitive dual-rail applications-integrating buck, LDO, and power-good in a single DFN/MSOP package to reduce solution size and simplify power architecture for portable electronics.
FAQ
What output voltages does the TC1303A-ZA0EMF provide?
The TC1303A-ZA0EMF provides two fixed output voltages: 1.2V at up to 500 mA from its synchronous buck regulator (VOUT1), and 2.5V at up to 300 mA from its low-dropout linear regulator (VOUT2). These values are confirmed by the "-ZA0" suffix in the part number and specified in the Electrical Characteristics table of DS21949C.
How does the power-good (PG) function operate in TC1303A-ZA0EMF?
The PG pin in TC1303A-ZA0EMF is an open-drain output that asserts low when the buck regulator output (VOUT1 = 1.2V) reaches 94% of its nominal value, with a 300 ms delay after regulation is achieved. It is not connected to the LDO output-this distinguishes TC1303A-ZA0EMF from TC1303B/C variants and is explicitly defined in the Functional Block Diagram and Pin Descriptions of DS21949C.
Can TC1303A-ZA0EMF operate from a single 3.3V input source?
Yes, TC1303A-ZA0EMF supports input voltages from 2.7V to 5.5V, making 3.3V fully compatible. At 3.3V input, the 1.2V buck output maintains >90% efficiency across 100–500 mA loads, and the 2.5V LDO operates with 800 mV headroom-well above its 137 mV typical dropout-ensuring stable regulation even at full 300 mA load.
What is the recommended output capacitance for each rail of TC1303A-ZA0EMF?
The buck output (VOUT1) requires a minimum 4.7 µF ceramic capacitor, while the LDO output (VOUT2) requires only 1 µF ceramic-both connected to AGND. This low LDO capacitance requirement is enabled by internal compensation and is validated in the Typical Application Circuits (DS21949C, page 5), reducing total solution size and cost versus traditional LDOs needing 10–22 µF.
Does TC1303A-ZA0EMF support independent enable control for each regulator?
Yes, TC1303A-ZA0EMF provides fully independent shutdown control: SHDN1 (pin 9) enables/disables the 500 mA buck regulator, and SHDN2 (pin 1) enables/disables the 300 mA LDO. Both inputs accept standard CMOS logic levels (VIH ≥ 45% VIN, VIL ≤ 15% VIN), allowing flexible sequencing-e.g., enabling the LDO first to bias control logic before powering the processor core via the buck regulator.
TC1303A-ZA0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 3.3V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303A-ZA0EMF FAQ
1.How can I place an order for TC1303A-ZA0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303A-ZA0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303A-ZA0EMF reliable?
The price and inventory of TC1303A-ZA0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303A-ZA0EMF is usually 5 days.
3.What payment methods are accepted for TC1303A-ZA0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303A-ZA0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303A-ZA0EMF?
TC1303A-ZA0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303A-ZA0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303A-ZA0EMF?
For technical support, including TC1303A-ZA0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303A-ZA0EMF requirements.
6.How does Aetrix verify that TC1303A-ZA0EMF is sourced from the original manufacturer or authorized distributors?
All TC1303A-ZA0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303A-ZA0EMF meets industry standards.
7.What is the process for return or replacement of TC1303A-ZA0EMF?
All TC1303A-ZA0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303A-ZA0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303A-ZA0EMF part is unused and in its original packaging.
Return procedure for TC1303A-ZA0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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