Microchip Technology TC1303A-ZA0EUNTR
- Part No.:
- TC1303A-ZA0EUNTR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TC1303A-ZA0EUNTR.pdf
- Description:
- IC REG DL BUCK/LNR SYNC 10MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,284
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TC1303A-ZA0EUNTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the buck output only. It delivers 1.2V @ 500 mA and 2.5V @ 300 mA from a 2.7–5.5V input, features 2.0 MHz fixed-frequency PWM operation, 65 µA typical quiescent current, and operates across –40°C to +125°C junction temperature. It is used in portable medical instruments requiring tightly regulated dual-rail supplies with battery-aware efficiency.
For engineers reviewing the TC1303A-ZA0EUNTR datasheet, TC1303A-ZA0EUNTR pinout, TC1303A-ZA0EUNTR application, or TC1303A-ZA0EUNTR equivalent, key selection considerations include its TC1303A-specific PG monitoring of VOUT1 only, independent SHDN1/SHDN2 control, 137 mV LDO dropout at 200 mA, DFN-10 package thermal resistance (θJA = 41°C/W), and compatibility with ceramic output capacitors as small as 1 µF on VOUT2.
Technical Context
The TC1303A-ZA0EUNTR implements a fixed-frequency 2.0 MHz synchronous buck stage with automatic transition to PFM mode under light load to maintain ultra-low IQ, while the LDO stage uses internal compensation and requires no external components beyond a 1 µF output capacitor. Its power-good circuit monitors only the buck output (VOUT1) with 94% threshold and 300 ms active timeout, per TC1303A variant specification.
Shutdown logic is fully independent: SHDN1 controls the buck regulator, SHDN2 controls the LDO, enabling flexible sequencing without external timing circuitry. Protection includes undervoltage lockout (2.55 V nominal), overtemperature shutdown (165°C), and short-circuit current limiting on both outputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion (2.7–4.2 V) and USB 5 V inputs without external pre-regulation |
| Buck Output Current | 500 mA max - sufficient for low-power microcontrollers or FPGA core rails |
| LDO Output Current | 300 mA max - powers I/O peripherals, sensors, or RF bias rails |
| Quiescent Current | 65 µA typical - enables >1-year battery life in always-on portable devices |
| Switching Frequency | 2.0 MHz ±0.4 MHz - allows use of compact 4.7 µH inductors and reduces EMI filtering burden |
| LDO Dropout Voltage | 137 mV @ 200 mA - ensures stable 2.5 V output even with 2.637 V minimum input |
| Power-Good Delay | 262 ms typical active timeout - provides reliable processor reset hold time after startup |
Pinout & Package
TC1303A-ZA0EUNTR is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), optimized for high-power-density PCB layouts and thermal performance (θJA = 41°C/W on 4-layer board). The EP must be connected to AGND for electrical integrity and thermal conduction.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control | Active-high logic input (>45% VIN); enables/disables 300 mA LDO independently of buck stage |
| 2 (VIN2) | LDO input supply | Accepts same input as VIN1; must be routed with minimal trace length to reduce noise coupling |
| 3 (VOUT2) | LDO regulated output | Delivers fixed 2.5 V; requires ≥1 µF ceramic capacitor to AGND for stability |
| 4 (PG) | Power-good indicator | Open-drain output asserting when VOUT1 reaches ≥94% of target; pulls low after 262 ms timeout if regulation fails |
| 5 (AGND) | Analog ground reference | Must be tied to clean analog ground plane; separate from PGND to minimize switching noise injection |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; connects to AGND only at single point near EP |
| 7 (LX) | Buck switch node | Connects to external inductor; carries high di/dt; requires tight layout and Kelvin connection to PGND |
| 8 (VIN1) | Buck input supply | Primary input for 500 mA buck stage; shares source with VIN2 but routed separately for optimal decoupling |
| 9 (SHDN1) | Buck shutdown control | Active-high logic input (>45% VIN); enables/disables buck regulator without affecting LDO |
| 10 (VFB1/VOUT1) | Buck feedback/sense | Configured as VOUT1 for fixed-output variants; accepts 1.2 V output directly (no divider needed) |
Key Features
| Feature | Design Value |
|---|---|
| Independent dual shutdown control | SHDN1 and SHDN2 allow staggered enable/disable of buck and LDO for precise power sequencing in multi-rail systems |
| Internally compensated LDO | Eliminates need for external compensation network; supports stable operation with only 1 µF ceramic output capacitor |
| 2.0 MHz fixed-frequency PWM | Enables use of sub-5 mm inductors and reduces output capacitor size vs. lower-frequency alternatives |
| Automatic PWM-to-PFM transition | Maintains high light-load efficiency without requiring external mode-control circuitry or firmware intervention |
| Open-drain PG with 300 ms delay | Provides robust reset signaling compatible with standard microcontroller reset inputs; delay prevents false asserts during transient startup |
Applications
| Handheld Medical Instruments | USB-Powered Devices |
|---|---|
Use Scenario: Portable blood glucose meters requiring dual-rail operation: 1.2 V for MCU core and 2.5 V for analog sensor interface. IC Role / Device Role / Timing Role: Dual-output PMIC providing isolated, low-noise supplies with coordinated startup and PG-driven system reset. Use Value: 65 µA quiescent current extends single AAA battery life beyond 18 months in standby; 137 mV LDO dropout enables full 2.5 V regulation down to 2.637 V input. | Use Scenario: USB-powered industrial data loggers drawing power from host PC or wall adapter (5 V). IC Role / Device Role / Timing Role: Primary voltage translator generating 1.2 V core and 2.5 V I/O rails from 5 V USB input with integrated PG reset. Use Value: 2.0 MHz switching frequency minimizes EMI interference with USB 2.0 data lines; DFN-10 footprint saves >30% board area vs. discrete solutions. |
| Cellular Phones | Portable Computers |
Use Scenario: Feature phone baseband subsystem needing efficient 1.2 V core and 2.5 V RF front-end bias under varying battery voltage (3.0–4.2 V). IC Role / Device Role / Timing Role: Integrated buck+LDO regulator delivering stable dual outputs with independent shutdown for subsystem power gating. Use Value: Independent SHDN1/SHDN2 pins allow modem sleep mode (LDO off, buck active) and deep-sleep mode (both off), reducing system leakage by >99%. | Use Scenario: Ultra-thin notebook auxiliary power rail for embedded controller (EC) and touchpad interface. IC Role / Device Role / Timing Role: Secondary PMIC supplying 1.2 V EC core and 2.5 V interface from main 5 V rail, with PG monitoring for safe boot sequence. Use Value: PG assertion delay (262 ms) matches typical EC firmware initialization window; open-drain PG simplifies level-shifting to 3.3 V logic domains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303B-ZA0EUNTR | PG monitors LDO output (VOUT2) instead of buck output; push-pull PG output | Suitable where LDO rail stability is primary reset trigger (e.g., sensor bias supply) | Select TC1303B-ZA0EUNTR only if system reset must be gated by LDO regulation, not buck rail |
| TPS65023RGZR | Triple-output (2 buck + 1 LDO); higher IQ (80 µA); 2.25 MHz switching; QFN-24 package | Supports more complex multi-rail systems (e.g., ARM Cortex-A8 with DDR, core, I/O) | Choose TPS65023RGZR when third regulated rail or higher integration is required; not drop-in compatible |
Compared with TC1303B-ZA0EUNTR, TC1303A-ZA0EUNTR provides earlier reset assertion aligned with processor core availability; versus TPS65023RGZR, it offers smaller footprint and lower IQ for simpler dual-rail designs where third output is unnecessary.
Availability
TC1303A-ZA0EUNTR is available at Aetrix Electronics and suitable for handheld medical instruments, USB-powered devices, and cellular phones requiring stable component supply, long-term lifecycle support, and automotive-grade temperature range (–40°C to +125°C).
Supply support for TC1303A-ZA0EUNTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving industrial, automotive, consumer, and communications markets with high-reliability semiconductor products.
The TC1303 series was designed specifically for space-constrained portable electronics requiring highly integrated, low-quiescent-current dual-rail power management with minimal external components.
FAQ
What output voltages does the TC1303A-ZA0EUNTR deliver?
The TC1303A-ZA0EUNTR delivers a fixed 1.2 V output from its buck regulator (VOUT1) and a fixed 2.5 V output from its LDO (VOUT2), as indicated by the "ZA" suffix in the part number per Microchip's ordering guide. These values are factory-trimmed and require no external feedback resistors.
How does the power-good (PG) function operate on the TC1303A-ZA0EUNTR?
The TC1303A-ZA0EUNTR's PG pin is an open-drain output that asserts low when the buck output (VOUT1) reaches ≥94% of its nominal value and remains asserted for 262 ms (typical) once regulation is achieved. It deasserts if VOUT1 falls below 92% of nominal, providing reliable reset signaling for processors.
Can the TC1303A-ZA0EUNTR be used with a single input source for both VIN1 and VIN2?
Yes - the TC1303A-ZA0EUNTR is explicitly designed for shared input operation: VIN1 and VIN2 are intended to be connected together with short, low-inductance traces. This configuration simplifies power routing and ensures consistent input conditions for both regulators.
What is the minimum output capacitance required for stable operation of the TC1303A-ZA0EUNTR's LDO?
The TC1303A-ZA0EUNTR's LDO (VOUT2) requires a minimum of 1 µF ceramic capacitor connected between VOUT2 and AGND for guaranteed stability across all operating conditions, as specified in the datasheet and validated in typical application circuits.
Does the TC1303A-ZA0EUNTR support automatic power mode transitions?
Yes - the TC1303A-ZA0EUNTR's buck regulator automatically transitions from PWM mode (at heavy loads) to PFM mode (at light loads) to maintain high efficiency across the full 0–500 mA load range, with no external control or configuration required.
TC1303A-ZA0EUNTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 3.3V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
TC1303A-ZA0EUNTR FAQ
1.How can I place an order for TC1303A-ZA0EUNTR through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303A-ZA0EUNTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303A-ZA0EUNTR reliable?
The price and inventory of TC1303A-ZA0EUNTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303A-ZA0EUNTR is usually 5 days.
3.What payment methods are accepted for TC1303A-ZA0EUNTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303A-ZA0EUNTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303A-ZA0EUNTR?
TC1303A-ZA0EUNTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303A-ZA0EUNTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303A-ZA0EUNTR?
For technical support, including TC1303A-ZA0EUNTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303A-ZA0EUNTR requirements.
6.How does Aetrix verify that TC1303A-ZA0EUNTR is sourced from the original manufacturer or authorized distributors?
All TC1303A-ZA0EUNTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303A-ZA0EUNTR meets industry standards.
7.What is the process for return or replacement of TC1303A-ZA0EUNTR?
All TC1303A-ZA0EUNTR units undergo pre-shipment inspection (PSI). If there is an issue with TC1303A-ZA0EUNTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303A-ZA0EUNTR part is unused and in its original packaging.
Return procedure for TC1303A-ZA0EUNTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TC1303A-ZA0EUNTR Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

