Microchip Technology TC1303A-ZP0EUNTR
- Part No.:
- TC1303A-ZP0EUNTR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TC1303A-ZP0EUNTR.pdf
- Description:
- IC REG DL BUCK/LNR SYNC 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303A-ZP0EUNTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the buck output only. It delivers 1.2V @ 500 mA and 2.5V @ 300 mA from a 2.7–5.5V input, features 2.0 MHz fixed-frequency PWM operation, 65 µA typical quiescent current, and operates across –40°C to +125°C junction temperature. It targets space-constrained portable electronics requiring tightly regulated dual-rail supplies.
For engineers reviewing the TC1303A-ZP0EUNTR datasheet, TC1303A-ZP0EUNTR pinout, TC1303A-ZP0EUNTR application, or TC1303A-ZP0EUNTR equivalent, key selection criteria include its buck-only power-good monitoring, independent shutdown control for each regulator, 137 mV LDO dropout at 200 mA, internal compensation, and compatibility with 1 µF ceramic output capacitors on both rails - critical for battery-powered medical instruments and USB devices.
Technical Context
The TC1303A-ZP0EUNTR implements a synchronous buck converter with PFM/PWM auto-transition and an independently controlled LDO, both internally compensated and sharing no feedback coupling. Its PG signal monitors only VOUT1 (buck output) with 94% threshold and 300 ms delay, distinguishing it from TC1303B (LDO-monitored) and TC1303C/TC1304 (dual-monitored). The device uses separate SHDN1 and SHDN2 inputs for granular power sequencing.
It integrates high-side and low-side MOSFETs with 450 mΩ RDS(on) each, supports adjustable (0.8–4.5V) or fixed VOUT1 outputs, and provides thermal shutdown at 165°C with 10°C hysteresis. UVLO activates below 2.4V and releases at 2.7V, ensuring stable startup under weak input conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion (2.7–4.2 V) and USB 5 V rails without external pre-regulation |
| Buck Output Current | 500 mA maximum - sufficient for low-power microcontrollers or DSP cores requiring 1.2 V or 1.8 V |
| LDO Output Current | 300 mA maximum - powers I/O peripherals, sensors, or RF sections with low-noise bias |
| Quiescent Current | 65 µA typical - enables >1-year battery life in always-on wearable or medical sensor modes |
| Switching Frequency | 2.0 MHz fixed (±0.4 MHz) - allows use of compact 4.7 µH inductors and reduces EMI in sensitive analog sections |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - maintains regulation down to VIN = VOUT2 + 0.137 V, easing input supply design |
| Power-Good Delay | 300 ms active timeout - provides reliable processor reset timing after stable VOUT1 establishment |
Pinout & Package
TC1303A-ZP0EUNTR is housed in a 10-lead 3×3 mm DFN package with exposed pad (EP) connected to AGND. Pin assignments are validated per Microchip DS21949C-page 3 and page 5 schematics.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control | Active-low logic input; <15% VIN disables LDO, >45% VIN enables - enables independent LDO power gating |
| 2 (VIN2) | LDO input supply | Accepts same input as VIN1; must be short-traced to VIN1 to minimize noise coupling into LDO path |
| 3 (VOUT2) | LDO regulated output | Delivers fixed 2.5 V (per ZP0EUNTR suffix); requires ≥1 µF ceramic capacitor to AGND for stability |
| 4 (PG) | Power-good indicator | Open-drain output asserting when VOUT1 reaches 94% of target; pulls low after 300 ms delay upon valid regulation |
| 5 (AGND) | Analog ground reference | Must connect to clean analog ground plane; separates noise-sensitive feedback paths from PGND |
| 6 (PGND) | Power ground return | High-current return for buck switch node (LX); routed separately from AGND to avoid ground bounce |
| 7 (LX) | Buck switch node | Connects to external inductor; carries pulsed current up to 700 mA peak - requires low-inductance layout |
| 8 (VIN1) | Buck input supply | Primary input for synchronous buck; shares source with VIN2 but routed separately for optimal decoupling |
| 9 (SHDN1) | Buck shutdown control | Active-low logic input; independent of SHDN2 - enables staggered or selective regulator enable/disable |
| 10 (VFB1/VOUT1) | Buck feedback/sense | Fixed-output variant ties directly to VOUT1; used for resistor divider in adjustable versions - sets 1.2 V output here |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown control | Separate SHDN1 and SHDN2 pins allow precise sequencing - e.g., hold LDO active while cycling buck for dynamic voltage scaling |
| Internal compensation | Eliminates external compensation components for both regulators, reducing BOM count and board area by ≥3 passive parts |
| PFM/PWM auto-transition | Seamlessly shifts from PWM (heavy load) to PFM (light load) without control-loop instability or audible switching noise |
| Low-noise LDO output | 1.8 µV/√Hz output noise and 62 dB PSRR at ≤100 Hz enable clean bias for ADC references or RF synthesizers |
| Thermal & overcurrent protection | 165°C thermal shutdown with 10°C hysteresis and cycle-by-cycle current limiting prevent damage during overload or poor heatsinking |
| UVLO with hysteresis | 2.55 V turn-on threshold with 200 mV hysteresis prevents oscillation near brown-out conditions during battery discharge |
Applications
| Portable Medical Sensors | USB-Powered Test Equipment |
|---|---|
Use Scenario: Wearable ECG patch with ultra-low-power MCU and analog front-end. IC Role / Device Role / Timing Role: Dual-rail power source: 1.2 V for ARM Cortex-M0+ core, 2.5 V for precision ADC reference and op-amps. Use Value: 65 µA quiescent current extends battery life beyond 18 months; 137 mV LDO dropout ensures stable 2.5 V even as Li-ion drops to 2.8 V. |
Use Scenario: Handheld oscilloscope module powered solely via USB 5 V. IC Role / Device Role / Timing Role: Primary power conditioner: steps 5 V to 1.2 V (digital logic) and 2.5 V (analog signal chain). Use Value: 2.0 MHz switching enables compact 4.7 µH inductor; open-drain PG asserts reset to MCU only after both rails stabilize. |
| Industrial Handheld Terminals | Low-Power IoT Edge Nodes |
Use Scenario: Rugged barcode scanner with display backlight and wireless BLE radio. IC Role / Device Role / Timing Role: Central PMIC supplying 1.2 V to application processor, 2.5 V to display driver and RF transceiver. Use Value: Independent SHDN1/SHDN2 allows deep-sleep mode where only LDO remains active for RTC and wake-up circuitry. |
Use Scenario: Battery-operated environmental sensor node transmitting data every 5 minutes. IC Role / Device Role / Timing Role: Power manager enabling burst-mode operation: buck powers MCU during transmit, LDO sustains sensor bias continuously. Use Value: PFM mode reduces light-load IQ to <100 µA; 300 ms PG delay guarantees reliable boot before firmware initialization. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP16311-H/MS | Single 600 mA buck + integrated LDO controller (external pass transistor); no internal LDO; PG monitors buck only | Requires external LDO components and compensation; higher design complexity but greater flexibility in LDO selection | Choose when adjustable LDO output voltage or higher LDO current (>300 mA) is required |
| TPS65023RSBR | Triple-output PMIC (2 buck + 1 LDO); 1.2/1.8/3.3 V fixed; PG monitors all three rails; 16-pin QFN | Higher integration for multi-rail SoC systems; larger footprint and higher cost; not pin-compatible | Choose for applications needing three regulated rails and tighter rail coordination, e.g., OMAP-based designs |
Compared with MCP16311-H/MS and TPS65023RSBR, TC1303A-ZP0EUNTR offers the smallest solution size (3×3 mm DFN), lowest quiescent current, and simplest bill-of-materials for fixed dual-rail needs - ideal when 1.2 V/2.5 V outputs and buck-only PG monitoring match system requirements.
Availability
TC1303A-ZP0EUNTR is available at Aetrix Electronics and suitable for portable medical sensors, USB-powered test equipment, and industrial handheld terminals requiring stable component supply with full traceability and long-term lifecycle support.
Supply support for TC1303A-ZP0EUNTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog, and power management solutions, with broad industrial and automotive qualification coverage.
The TC1303 family was designed specifically for space-constrained, battery-powered portable electronics requiring highly integrated, low-quiescent dual-rail power conversion with minimal external components.
FAQ
What output voltages does TC1303A-ZP0EUNTR provide?
TC1303A-ZP0EUNTR delivers a fixed 1.2 V output from its synchronous buck regulator (VOUT1) and a fixed 2.5 V output from its low-dropout linear regulator (VOUT2), as indicated by the "ZP0" suffix in the part number. Both outputs are factory-trimmed to ±0.3% tolerance and require no external resistors for configuration.
How does the power-good (PG) function operate in TC1303A-ZP0EUNTR?
In TC1303A-ZP0EUNTR, the PG pin is an open-drain output that monitors only the buck regulator output (VOUT1). It asserts low after a 300 ms delay once VOUT1 reaches 94% of its nominal value and remains low if VOUT1 falls below 92%. This behavior is specific to the TC1303A variant and differs from TC1303B (LDO-monitored) or TC1303C (dual-monitored).
Can TC1303A-ZP0EUNTR operate with a single input source for both VIN1 and VIN2?
Yes - TC1303A-ZP0EUNTR is designed to accept a common input source applied to both VIN1 and VIN2. The datasheet explicitly states "VIN1 and VIN2 are supplied by the same input source" and recommends connecting them with short, low-inductance board traces to minimize noise coupling between the buck and LDO input paths.
What is the minimum output capacitor required for stable operation of TC1303A-ZP0EUNTR?
TC1303A-ZP0EUNTR requires a minimum 1 µF ceramic capacitor on the VOUT2 (LDO) pin to AGND for stability, and a minimum 4.7 µF ceramic capacitor on the VOUT1 (buck) output. These values are specified in the Typical Application Circuits (DS21949C-page 5) and are mandatory for maintaining loop stability and transient response across temperature and load.
Does TC1303A-ZP0EUNTR support automatic mode transition between PWM and PFM?
Yes - TC1303A-ZP0EUNTR automatically transitions from fixed-frequency PWM mode (used under heavy load) to pulse-frequency modulation (PFM) mode under light load without external control or configuration. This feature reduces quiescent current to ~65 µA typical and eliminates audible switching noise, as confirmed in the Functional Description and Electrical Characteristics sections of DS21949C.
TC1303A-ZP0EUNTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 1.8V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
TC1303A-ZP0EUNTR FAQ
1.How can I place an order for TC1303A-ZP0EUNTR through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303A-ZP0EUNTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303A-ZP0EUNTR reliable?
The price and inventory of TC1303A-ZP0EUNTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303A-ZP0EUNTR is usually 5 days.
3.What payment methods are accepted for TC1303A-ZP0EUNTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303A-ZP0EUNTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303A-ZP0EUNTR?
TC1303A-ZP0EUNTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303A-ZP0EUNTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303A-ZP0EUNTR?
For technical support, including TC1303A-ZP0EUNTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303A-ZP0EUNTR requirements.
6.How does Aetrix verify that TC1303A-ZP0EUNTR is sourced from the original manufacturer or authorized distributors?
All TC1303A-ZP0EUNTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303A-ZP0EUNTR meets industry standards.
7.What is the process for return or replacement of TC1303A-ZP0EUNTR?
All TC1303A-ZP0EUNTR units undergo pre-shipment inspection (PSI). If there is an issue with TC1303A-ZP0EUNTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303A-ZP0EUNTR part is unused and in its original packaging.
Return procedure for TC1303A-ZP0EUNTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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