Microchip Technology TC1303A-ZS0EMFTR

Overview

TC1303A-ZS0EMFTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the buck output only. It delivers 1.2V @ 500 mA and 2.5V @ 300 mA from a 2.7–5.5V input, achieves >90% efficiency at 2.0 MHz switching frequency, and operates across –40°C to +125°C junction temperature for portable medical instruments and USB-powered devices.

For engineers reviewing the TC1303A-ZS0EMFTR datasheet, TC1303A-ZS0EMFTR pinout, TC1303A-ZS0EMFTR application, or TC1303A-ZS0EMFTR equivalent, key selection criteria include independent shutdown control per rail, 65 µA typical quiescent current, 137 mV LDO dropout at 200 mA, open-drain PG with 300 ms delay, and compatibility with 3×3 mm DFN-10 packaging.

Technical Context

The TC1303A-ZS0EMFTR implements a fixed-frequency 2.0 MHz PWM buck stage with automatic transition to PFM mode under light load to maintain ultra-low IQ, while its LDO uses internal compensation and requires only a 1 µF ceramic output capacitor. The device monitors only the buck output (VOUT1) for power-good assertion - distinguishing it from TC1303B (LDO-only monitoring) and TC1303C/TC1304 (dual-rail monitoring).

Its shutdown architecture features separate SHDN1 (buck) and SHDN2 (LDO) inputs with 45% VIN high-threshold and 15% VIN low-threshold logic levels, enabling flexible sequencing in battery-powered systems. Protection includes undervoltage lockout (2.55 V nominal), overtemperature shutdown (165°C), and short-circuit current limiting on both outputs.

Key Specifications

Pinout & Package

TC1303A-ZS0EMFTR is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), optimized for high thermal performance on 4-layer PCBs (θJA = 41°C/W). Pin 1 is SHDN2; pin 10 is PG. The EP must be connected to AGND for proper thermal dissipation and noise immunity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output PMIC applications.

Compared with MCP16311-H/MS and TPS62231RGTR, TC1303A-ZS0EMFTR uniquely integrates buck + LDO + PG in one DFN-10 package, eliminating three external components and enabling true single-chip dual-rail power for space-constrained portable designs.

Availability

TC1303A-ZS0EMFTR is available at Aetrix Electronics and suitable for USB-powered devices, handheld medical instruments, and industrial handheld terminals requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for TC1303A-ZS0EMFTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.

The TC1303 family was designed specifically for portable and battery-operated applications needing compact, efficient dual-rail power with minimal external components - targeting cellular phones, PDAs, and USB peripherals before the rise of modern ultra-low-power SoCs.

FAQ

What output voltages does the TC1303A-ZS0EMFTR provide?

The TC1303A-ZS0EMFTR is a factory-configured fixed-output variant delivering 1.2V from its buck regulator (VOUT1) and 2.5V from its LDO (VOUT2). These values are laser-trimmed during production and do not require external resistive feedback networks. Both outputs are specified across the full –40°C to +125°C junction temperature range with ±0.3% tolerance.

How does the power-good (PG) function operate in TC1303A-ZS0EMFTR?

In TC1303A-ZS0EMFTR, the PG pin is an open-drain output that monitors only the buck regulator output (VOUT1). It asserts low when VOUT1 reaches ≥94% of its nominal value and remains asserted for a minimum 300 ms timeout period. If VOUT1 drops below 92% during operation, PG deasserts within 165 µs. This behavior is specific to the "A" variant - unlike TC1303B (LDO-monitored) or TC1303C (dual-monitored).

Can TC1303A-ZS0EMFTR support independent enable/disable of its two regulators?

Yes. TC1303A-ZS0EMFTR provides fully independent control via SHDN1 (buck enable) and SHDN2 (LDO enable), each with CMOS-compatible thresholds (VIH ≥ 45% VIN, VIL ≤ 15% VIN). This allows precise sequencing - for example, enabling the LDO first to power analog circuitry before bringing up the digital core rail - without requiring external logic or timers.

What is the thermal performance of TC1303A-ZS0EMFTR in its DFN package?

TC1303A-ZS0EMFTR in the 3×3 mm DFN-10 package achieves θJA = 41°C/W on a standard 4-layer PCB with internal ground plane and two thermal vias under the exposed pad. This enables full 500 mA buck + 300 mA LDO operation up to +85°C ambient without derating. Thermal shutdown activates at +165°C junction temperature with 10°C hysteresis to prevent oscillation.

Does TC1303A-ZS0EMFTR require external compensation components?

No. TC1303A-ZS0EMFTR features fully internal compensation for both the buck regulator and the LDO, eliminating the need for external capacitors or resistors in the feedback loop. This simplifies layout, reduces BOM count, and guarantees stability across all operating conditions - including minimum 1 µF ceramic output capacitance on VOUT2 and 4.7 µF on VOUT1.