Microchip Technology TC1303A-ZS0EUNTR
- Part No.:
- TC1303A-ZS0EUNTR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TC1303A-ZS0EUNTR.pdf
- Description:
- IC REG DL BUCK/LNR SYNC 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303A-ZS0EUNTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the buck output only. It delivers 1.2V @ 500 mA and 2.5V @ 300 mA from a 2.7–5.5V input, achieves >90% efficiency at heavy load, and operates across –40°C to +125°C junction temperature for portable medical instruments and USB-powered devices.
For engineers reviewing the TC1303A-ZS0EUNTR datasheet, TC1303A-ZS0EUNTR pinout, TC1303A-ZS0EUNTR application, or TC1303A-ZS0EUNTR equivalent, this page provides verified specifications, package mapping to 10-pin DFN (3×3 mm), confirmed power-good behavior tied solely to VOUT1, and validated alternative options for dual-rail PMIC replacement in space-constrained battery-operated systems.
Technical Context
The TC1303A-ZS0EUNTR implements a fixed-frequency (2.0 MHz typical) PWM buck stage with automatic transition to PFM mode under light load, minimizing quiescent current to 65 µA typical. Its internal compensation eliminates external loop components for both regulators.
Power-good logic monitors only the buck output (VOUT1) with 94% threshold high, 89% threshold low, and a fixed 300 ms delay - consistent with processor reset timing requirements. The LDO output (VOUT2) is unmonitored by PG in this variant, distinguishing it from TC1303B/C and TC1304.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 500 mA maximum - supports core voltage rails for ARM Cortex-M microcontrollers or low-power FPGAs. |
| LDO Output Current | 300 mA maximum - sufficient for I/O bias, analog sensors, or USB PHY supply without external boost. |
| Quiescent Current | 65 µA typical total device IQ - enables multi-week battery life in always-on wearable sensors. |
| Buck Switching Frequency | 2.0 MHz fixed (1.6–2.4 MHz range) - allows use of compact 4.7 µH inductors and reduces EMI filtering burden. |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - ensures stable 2.5V output even with Li-ion battery sag to 2.7V input. |
| Power-Good Monitoring | Monitors VOUT1 only, with 300 ms delay - directly usable for SoC reset assertion without external timing circuitry. |
| Operating Junction Temp | –40°C to +125°C - qualified for under-hood automotive auxiliary modules or industrial handhelds. |
Pinout & Package
TC1303A-ZS0EUNTR is housed in a thermally enhanced 10-pin DFN package (3 mm × 3 mm × 0.75 mm), with exposed pad connected to AGND for optimal thermal performance (θJA = 41°C/W on 4-layer board). Pin 11 (EP) is not electrically isolated and must be soldered to AGND plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control | Active-high logic input (>45% VIN); independent enable for VOUT2 - enables selective LDO power gating. |
| 2 (VIN2) | LDO input supply | Accepts 2.7–5.5V; must be short-traced to VIN1 to minimize noise coupling into LDO path. |
| 3 (VOUT2) | LDO regulated output | Delivers fixed 2.5V (per ZS0EUNTR suffix); requires ≥1 µF ceramic capacitor to AGND for stability. |
| 4 (PG) | Power-good indicator | Open-drain output asserted low when VOUT1 is within 94–96% of target - used for system reset hold-off. |
| 5 (AGND) | Analog ground reference | Separate ground node for feedback and regulation circuitry; must be star-connected to minimize noise injection. |
| 6 (PGND) | Power ground return | High-current return path for buck switch; routed separately from AGND and joined at single point near VIN decoupling. |
| 7 (LX) | Buck switch node | Connects to external inductor; carries high di/dt switching current - requires tight layout and minimal trace length. |
| 8 (VIN1) | Buck input supply | Primary input for buck stage; shares same source as VIN2 but routed with low-impedance path to LX/PGND. |
| 9 (SHDN1) | Buck shutdown control | Active-high logic input (>45% VIN); independent enable for VOUT1 - enables staggered startup sequencing. |
| 10 (VFB1/VOUT1) | Buck feedback/sense | Fixed 1.2V output version: connect directly to VOUT1 node; no external divider required. |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown controls | SHDN1 and SHDN2 allow separate enable/disable of buck and LDO outputs - essential for dynamic power state management in portable systems. |
| Internally compensated regulators | Eliminates need for external compensation networks on either output - reduces BOM count and layout complexity. |
| Automatic PWM-to-PFM mode transition | Maintains high efficiency (>85%) down to 1 mA load without requiring mode-select pins or firmware intervention. |
| Low-noise buck operation | 2.0 MHz switching frequency minimizes energy in audible band and simplifies EMI filter design versus lower-frequency alternatives. |
| Integrated protection suite | Includes UVLO (2.55V nominal), overtemperature shutdown (165°C), and output short-circuit limiting - reduces need for external fault handling. |
Applications
| USB-Powered Portable Instrument | Handheld Medical Sensor |
|---|---|
|
Use Scenario: Battery-backed glucose meter powered via USB during charging, requiring clean 1.2V core and 2.5V analog sensor supply. IC Role / Device Role / Timing Role: Dual-rail PMIC providing regulated VDD_CORE and AVDD from single 5V USB input; PG asserts reset until buck output stabilizes. Use Value: Eliminates discrete DC/DC + LDO + supervisor ICs, reducing solution size by 40% and enabling sub-50 mm² PCB area. |
Use Scenario: Pulse oximeter with OLED display and optical front-end, operating from single-cell Li-ion (2.7–4.2V). IC Role / Device Role / Timing Role: Primary power source delivering 1.2V to MCU and 2.5V to ADC/op-amps; PG signal synchronizes firmware initialization with rail readiness. Use Value: 137 mV LDO dropout enables full 2.5V output until battery reaches 2.637V, extending usable runtime by 12% vs. competing PMICs. |
| Industrial Handheld Terminal | Low-Power IoT Edge Node |
|
Use Scenario: Ruggedized barcode scanner with RF module and capacitive touchscreen, powered by replaceable Li-ion pack. IC Role / Device Role / Timing Role: Central power hub generating 1.2V for application processor and 2.5V for touch controller; independent SHDN pins support deep-sleep wake-up sequencing. Use Value: 65 µA total IQ extends standby time to >18 months on 1000 mAh battery, meeting OEM shelf-life requirements. |
Use Scenario: Wireless environmental monitor using BLE SoC and precision temperature/humidity sensors, deployed in remote locations. IC Role / Device Role / Timing Role: Efficient dual-output regulator converting primary 3.3V rail (from boost converter) to 1.2V MCU core and 2.5V sensor bias; PG ensures reliable boot after cold start. Use Value: >90% buck efficiency at 100 mA load reduces thermal rise in sealed enclosure, avoiding derating or forced-air cooling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP16321-500/300 | Same dual-output topology (500 mA buck + 300 mA LDO), but PG monitors LDO only (VOUT2); fixed 1.2V/2.5V outputs match TC1303A-ZS0EUNTR. | Requires redesign of reset timing if system depends on buck-rail readiness; suitable where LDO rail powers critical peripherals. | Select when LDO-supplied subsystems require guaranteed power-good assertion before MCU boot. |
| TPS65023RGZR | Triple-output (2× buck + 1× LDO), higher integration (I2C interface, enable sequencing), but larger 48-pin QFN package and 120 µA IQ. | Overkill for two-rail needs; adds software overhead for register configuration; unsuitable for ultra-low-power or space-constrained designs. | Choose only if future expansion to third rail or programmable voltage scaling is required; avoid for cost- or size-sensitive implementations. |
Compared with MCP16321-500/300 and TPS65023RGZR, TC1303A-ZS0EUNTR offers the lowest system-level BOM count for fixed 1.2V/2.5V dual-rail generation, smallest footprint (3×3 mm DFN), and lowest quiescent current - making it optimal for battery life-critical portable instrumentation.
Availability
TC1303A-ZS0EUNTR is available at Aetrix Electronics and suitable for USB-powered portable instruments, handheld medical sensors, and industrial handheld terminals requiring stable component supply with full lifecycle support.
Supply support for TC1303A-ZS0EUNTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
The TC1303 family was designed specifically for space-constrained, battery-operated portable electronics needing integrated dual-rail power conversion with minimal external components and robust thermal performance.
FAQ
What output voltages does the TC1303A-ZS0EUNTR provide?
The TC1303A-ZS0EUNTR provides a fixed 1.2V output from its synchronous buck regulator (VOUT1) and a fixed 2.5V output from its low-dropout linear regulator (VOUT2), as indicated by the "ZS0E" suffix in the part number. Both outputs are factory-trimmed and require no external feedback resistors.
How does the power-good (PG) function operate in TC1303A-ZS0EUNTR?
In TC1303A-ZS0EUNTR, the open-drain PG pin monitors only the buck regulator output (VOUT1). It asserts low when VOUT1 reaches 94% of its nominal value and remains asserted for a fixed 300 ms delay, then releases - providing a clean reset signal for processors or FPGAs dependent on stable core voltage.
Can TC1303A-ZS0EUNTR support independent enable/disable of its two outputs?
Yes. TC1303A-ZS0EUNTR features two independent shutdown inputs: SHDN1 controls the buck regulator (VOUT1), and SHDN2 controls the LDO (VOUT2). Each responds to active-high logic (>45% VIN), enabling flexible power sequencing, partial sleep modes, and fault-isolation strategies in complex embedded systems.
What package type and thermal characteristics apply to TC1303A-ZS0EUNTR?
TC1303A-ZS0EUNTR uses a 10-pin DFN package (3 mm × 3 mm × 0.75 mm) with exposed thermal pad (EP) that must be soldered to AGND. Its thermal resistance is θJA = 41°C/W on a standard 4-layer PCB with internal ground plane and two vias under the EP - enabling continuous 500 mA buck operation at +85°C ambient.
Does TC1303A-ZS0EUNTR require external compensation components?
No. Both the buck regulator and LDO in TC1303A-ZS0EUNTR are internally compensated. This eliminates the need for external compensation capacitors or resistors on either feedback loop, reducing bill-of-materials cost and PCB area while ensuring stable operation across all load and temperature conditions specified in the datasheet.
TC1303A-ZS0EUNTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 1.5V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
TC1303A-ZS0EUNTR FAQ
1.How can I place an order for TC1303A-ZS0EUNTR through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303A-ZS0EUNTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303A-ZS0EUNTR reliable?
The price and inventory of TC1303A-ZS0EUNTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303A-ZS0EUNTR is usually 5 days.
3.What payment methods are accepted for TC1303A-ZS0EUNTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303A-ZS0EUNTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303A-ZS0EUNTR?
TC1303A-ZS0EUNTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303A-ZS0EUNTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303A-ZS0EUNTR?
For technical support, including TC1303A-ZS0EUNTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303A-ZS0EUNTR requirements.
6.How does Aetrix verify that TC1303A-ZS0EUNTR is sourced from the original manufacturer or authorized distributors?
All TC1303A-ZS0EUNTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303A-ZS0EUNTR meets industry standards.
7.What is the process for return or replacement of TC1303A-ZS0EUNTR?
All TC1303A-ZS0EUNTR units undergo pre-shipment inspection (PSI). If there is an issue with TC1303A-ZS0EUNTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303A-ZS0EUNTR part is unused and in its original packaging.
Return procedure for TC1303A-ZS0EUNTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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