Microchip Technology TC1303B-AG0EMF
- Part No.:
- TC1303B-AG0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303B-AG0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,666
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TC1303B-AG0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring specifically of the LDO output (VOUT2). It delivers 94% regulation threshold detection, 137 mV typical dropout at 200 mA for VOUT2, and operates across –40°C to +125°C junction temperature. It targets portable medical instruments requiring stable dual-rail biasing under battery-constrained conditions.
For engineers reviewing the TC1303B-AG0EMF datasheet, TC1303B-AG0EMF pinout, TC1303B-AG0EMF application, or TC1303B-AG0EMF equivalent, key selection criteria include LDO-monitored PG behavior, independent SHDN2 control, 2.0 MHz fixed-frequency PWM/PFM transition, 65 µA typical quiescent current, and DFN/MSOP package compatibility in space-constrained designs.
Technical Context
The TC1303B-AG0EMF implements a synchronous buck stage with integrated P- and N-channel MOSFETs (RDS(on) = 450 mΩ each), operating at 2.0 MHz nominal switching frequency and automatically transitioning between PWM and PFM modes to maintain efficiency at light loads. Its LDO stage uses internal compensation and requires only a single 1 µF ceramic output capacitor.
Power-good logic is dedicated solely to VOUT2 regulation - asserting high when VOUT2 reaches ≥94% of nominal and deasserting when falling below 92% - with a push-pull output structure (unlike open-drain variants) and 300 ms active timeout window. UVLO triggers at 2.55 V (typical) with 200 mV hysteresis, and thermal shutdown activates at 165°C with 10°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 500 mA max - supports core voltage rails for low-power microcontrollers or RF transceivers |
| LDO Output Current | 300 mA max - powers analog sensors or interface circuitry without external pass transistor |
| PG Monitoring Target | VOUT2 only - enables precise reset timing tied to auxiliary supply stability, not buck rail |
| Quiescent Current | 65 µA typical - extends battery life in always-on portable devices with dual-rail requirements |
| Switching Frequency | 2.0 MHz fixed (1.6–2.4 MHz range) - allows use of compact 4.7 µH inductors and reduces EMI filtering burden |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - enables operation down to VIN2 = VOUT2 + 0.137 V, critical for Li-ion discharge profiles |
| Operating Temp Range | –40°C to +125°C junction - qualified for industrial and medical environments with minimal derating |
Pinout & Package
TC1303B-AG0EMF is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), pin-compatible with the MSOP variant. The EP must be connected to AGND for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown input | Active-high logic (>45% VIN); enables/disables VOUT2 independently of buck stage |
| 2 (VIN2) | LDO input supply | Accepts 2.7–5.5 V; must be routed short and low-inductance to VIN1 |
| 3 (VOUT2) | LDO regulated output | Fixed 3.3 V output (per part number suffix 'AG'); requires ≥1 µF ceramic capacitor to AGND |
| 4 (PG) | Power-good indicator | Push-pull output; asserts high when VOUT2 ≥94% of 3.3 V; used for processor reset assertion |
| 5 (AGND) | Analog ground reference | Separate ground return for feedback and regulation circuitry; must tie to quiet analog plane |
| 6 (PGND) | Power ground | High-current return path for buck switch node; connects to power plane near LX and VIN1 |
| 7 (LX) | Buck switch node | Connects to external inductor; carries high di/dt; requires tight loop layout with PGND |
| 8 (VIN1) | Buck input supply | Accepts 2.7–5.5 V; shared with VIN2 per design note; requires local 4.7 µF input capacitance |
| 9 (SHDN1) | Buck shutdown input | Active-high logic (>45% VIN); controls buck stage independently of LDO |
| 10 (VFB1/VOUT1) | Buck feedback/sense | Configured as VOUT1 for fixed-output variants; for TC1303B-AG0EMF, this pin connects directly to 3.3 V buck output |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown control | SHDN1 and SHDN2 allow staged power sequencing - e.g., disable LDO first during sleep mode |
| Internally compensated LDO | Eliminates need for external compensation network; reduces BOM count and layout sensitivity |
| Push-pull PG output | Drives reset lines directly without pull-up resistor; ensures fast, deterministic assertion/deassertion timing |
| Low-noise buck architecture | 2.0 MHz fixed frequency + PFM mode minimizes conducted EMI and preserves light-load efficiency |
| Robust protection suite | Includes UVLO, overtemperature (165°C), and short-circuit protection on both outputs - no external fault handling required |
Applications
| Portable Medical Sensors | USB-Powered Test Equipment |
|---|---|
Use Scenario: Battery-powered glucose meter with analog front-end and BLE radio. IC Role / Device Role / Timing Role: TC1303B-AG0EMF supplies 3.3 V to BLE SoC (buck) and 3.3 V to precision ADC reference (LDO), with PG tied to MCU reset. Use Value: Independent LDO shutdown extends standby time; LDO-monitored PG prevents firmware boot before analog rail stabilizes. | Use Scenario: Handheld oscilloscope powered via USB 2.0 (5 V). IC Role / Device Role / Timing Role: Generates 3.3 V for FPGA core and 3.3 V for analog signal chain from 5 V bus; PG initiates FPGA configuration after LDO settles. Use Value: 137 mV LDO dropout enables full 3.3 V output even as USB voltage sags to 4.5 V; push-pull PG eliminates external pull-up. |
| Industrial Handheld Terminals | Wearable Health Monitors |
Use Scenario: Rugged barcode scanner with LCD backlight and imager sensor. IC Role / Device Role / Timing Role: Powers imager (3.3 V buck) and touch controller (3.3 V LDO); PG signal resets application processor only after LDO is valid. Use Value: –40°C to +125°C rating ensures operation in cold storage or hot vehicle cabins; independent SHDN2 allows touch controller to remain active during imager sleep. | Use Scenario: ECG patch with ultra-low-power MCU and analog front-end. IC Role / Device Role / Timing Role: Delivers 3.3 V to MCU (buck) and 3.3 V to instrumentation amplifier (LDO); PG enables precise wake-from-sleep timing. Use Value: 65 µA total IQ minimizes quiescent drain; LDO-monitored PG avoids false wake-ups caused by transient buck ripple. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP16311-H/MS | Single-output 600 mA buck only; no integrated LDO or PG monitoring | Requires external LDO and reset supervisor for dual-rail systems | Select when only buck regulation is needed and board area permits discrete support components |
| TPS650350RGER | 3-output PMIC (2 buck + 1 LDO); PG monitors primary buck; 2.25 MHz switching | Higher integration but lacks LDO-specific PG - less precise for LDO-dependent subsystems | Choose when system requires three rails and can tolerate PG tied to main processor supply instead of auxiliary rail |
Compared with MCP16311-H/MS and TPS650350RGER, TC1303B-AG0EMF uniquely provides LDO-monitored push-pull PG in a compact dual-rail package - simplifying reset timing for peripherals powered exclusively by the LDO output.
Availability
TC1303B-AG0EMF is available at Aetrix Electronics and suitable for portable medical instruments, USB-powered test equipment, and industrial handheld terminals requiring stable dual-rail supply with precise LDO-based power sequencing.
Supply support for TC1303B-AG0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog devices, and power management ICs for embedded control applications.
The TC1303 family was designed to deliver cost-effective, space-efficient dual-output regulation for battery-powered portable electronics where independent control and LDO-specific power-good signaling are essential.
FAQ
What output voltages does TC1303B-AG0EMF provide?
TC1303B-AG0EMF provides two fixed 3.3 V outputs: one from the 500 mA synchronous buck regulator (VOUT1) and one from the 300 mA low-dropout linear regulator (VOUT2). The 'AG' suffix in the part number explicitly denotes 3.3 V for both outputs, confirmed in Microchip's DS21949C datasheet Section 1.0 and Typical Application Circuits on page 5.
How does the power-good (PG) function operate in TC1303B-AG0EMF?
In TC1303B-AG0EMF, the PG pin is a push-pull output that monitors only the LDO output (VOUT2). It asserts high when VOUT2 reaches ≥94% of its nominal value (3.3 V) and deasserts low when VOUT2 falls below 92%, with a built-in 300 ms active timeout period. This behavior is specific to the TC1303B variant and differs from TC1303A (buck-monitored, open-drain) and TC1303C (dual-monitored).
Can TC1303B-AG0EMF be used with different input voltage sources for VIN1 and VIN2?
No - TC1303B-AG0EMF requires VIN1 and VIN2 to be supplied from the same input source, as explicitly stated in Note 8 of the Electrical Characteristics table (DS21949C-page 7). Routing separate supplies violates the device's internal biasing and may cause regulation instability or undefined PG behavior.
What is the thermal performance of TC1303B-AG0EMF in the DFN package?
TC1303B-AG0EMF in the 10-lead 3×3 mm DFN package has a typical junction-to-ambient thermal resistance (θJA) of 41°C/W on a 4-layer PCB with internal ground plane and two vias in the exposed pad. This enables continuous 500 mA buck operation up to +85°C ambient without forced airflow, provided the EP is soldered to AGND per Microchip's layout guidelines.
Is an external feedback resistor divider required for TC1303B-AG0EMF?
No - TC1303B-AG0EMF is a fixed-output variant; the 'AG' suffix indicates factory-trimmed 3.3 V outputs for both VOUT1 and VOUT2. The VFB1/VOUT1 pin (Pin 10) connects directly to the buck output and requires no external resistive network, unlike adjustable versions such as TC1303B-AB0EMF (1.2 V) or TC1303B-AE0EMF (2.5 V).
TC1303B-AG0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 3.3V, 500mA
- Voltage/Current - Output 2:
- 2.7V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303B-AG0EMF FAQ
1.How can I place an order for TC1303B-AG0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303B-AG0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303B-AG0EMF reliable?
The price and inventory of TC1303B-AG0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303B-AG0EMF is usually 5 days.
3.What payment methods are accepted for TC1303B-AG0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303B-AG0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303B-AG0EMF?
TC1303B-AG0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303B-AG0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303B-AG0EMF?
For technical support, including TC1303B-AG0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303B-AG0EMF requirements.
6.How does Aetrix verify that TC1303B-AG0EMF is sourced from the original manufacturer or authorized distributors?
All TC1303B-AG0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303B-AG0EMF meets industry standards.
7.What is the process for return or replacement of TC1303B-AG0EMF?
All TC1303B-AG0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303B-AG0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303B-AG0EMF part is unused and in its original packaging.
Return procedure for TC1303B-AG0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TC1303B-AG0EMF Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

