Microchip Technology TC1303B-DF0EMF
- Part No.:
- TC1303B-DF0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303B-DF0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303B-DF0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring specifically of the LDO output. It delivers 1.8V/500 mA and 3.3V/300 mA outputs, operates from 2.7–5.5V input, achieves >90% efficiency at heavy load, and features 65 µA typical quiescent current. It is used in portable medical instruments requiring sequenced, low-noise dual-rail supplies.
For engineers reviewing the TC1303B-DF0EMF datasheet, TC1303B-DF0EMF pinout, TC1303B-DF0EMF application, or TC1303B-DF0EMF equivalent, key selection criteria include LDO-monitored PG functionality, independent shutdown control per rail, 2.0 MHz fixed-frequency PWM operation, 137 mV typical dropout at 200 mA, and DFN-10 (3×3 mm) package compatibility with thermal pad grounding.
Technical Context
The TC1303B-DF0EMF implements a synchronous buck converter with automatic PWM-to-PFM mode transition under light load to minimize quiescent current, while its LDO uses internal compensation and requires only a single 1 µF ceramic output capacitor. The power-good signal is a push-pull output tied exclusively to VOUT2 regulation with 94% threshold and 300 ms delay.
Its dual-rail architecture supports independent enable/disable via SHDN1 (buck) and SHDN2 (LDO), and integrates UVLO (2.55 V nominal), overtemperature shutdown (165°C), and short-circuit protection on both outputs - all within a single 10-pin DFN package with exposed thermal pad connected to AGND.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion (2.7–4.2 V) and USB 5 V supply without external pre-regulation |
| Buck Output Current | 500 mA max - sufficient for core voltage of ARM Cortex-M4/M7 microcontrollers or FPGA I/O banks |
| LDO Output Current | 300 mA max - powers analog sensors, RF transceivers, or memory interfaces with low noise |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - enables stable 3.3 V output from 3.44 V minimum input, critical for battery-end-of-life operation |
| Quiescent Current | 65 µA typical - extends battery life in always-on portable medical devices during sleep mode |
| Power-Good Logic | Push-pull output monitoring VOUT2 only - eliminates need for external comparator when reset timing depends solely on LDO rail stability |
| Switching Frequency | 2.0 MHz fixed (±0.4 MHz) - allows use of compact 4.7 µH inductor and reduces EMI filtering requirements |
Pinout & Package
TC1303B-DF0EMF is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), rated for -40°C to +125°C junction temperature. The EP must be soldered to AGND for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SHDN2 | LDO shutdown control input | Active-high logic (>45% VIN); enables independent LDO disable for dynamic power gating in multi-rail systems |
| 2 - VIN2 | LDO input supply | Accepts same input as VIN1; must be routed with minimal trace length to reduce noise coupling into LDO path |
| 3 - VOUT2 | LDO regulated output | Delivers fixed 3.3 V (per DF0EMF suffix); requires ≥1 µF ceramic capacitor to AGND for stability |
| 4 - PG | Power-good status output | Push-pull, active-high signal indicating VOUT2 is within ±6% of regulation; drives processor RESET directly |
| 5 - AGND | Analog ground reference | Must connect to clean analog ground plane; separates noise-sensitive feedback paths from power return currents |
| 6 - PGND | Power ground return | High-current return for buck switch node (LX); isolated from AGND except at single-point star connection |
| 7 - LX | Buck switch node | Connects to external inductor; carries high di/dt switching current - requires tight loop layout with low-inductance PGND |
| 8 - VIN1 | Buck input supply | Primary input for synchronous buck stage; shares source with VIN2 but routed separately for optimal decoupling |
| 9 - SHDN1 | Buck shutdown control input | Active-high logic (>45% VIN); allows independent buck disable while LDO remains active for bias rails |
| 10 - VFB1/VOUT1 | Buck feedback or output | Configured as VOUT1 (fixed 1.8 V per DF0EMF suffix); connects directly to 1.8 V rail - no external divider needed |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown per regulator | Enables precise power sequencing: LDO can remain active to bias peripherals while buck is disabled during CPU sleep |
| Internally compensated buck and LDO | Eliminates external compensation components - reduces BOM count and layout area in space-constrained handheld designs |
| PG monitors LDO output only | Provides deterministic reset assertion based on auxiliary rail stability - essential for systems where LDO powers clock generators or PLLs |
| 2.0 MHz fixed-frequency PWM | Minimizes inductor size (4.7 µH typical) and simplifies EMI filter design compared to variable-frequency PFM-only regulators |
| Low-noise LDO output | 1.8 µV/√Hz output noise at 1 kHz enables direct powering of precision ADCs or RF synthesizers without additional filtering |
Applications
| Portable Medical Sensors | USB-Powered Diagnostic Tools |
|---|---|
Use Scenario: Continuous glucose monitor with Bluetooth LE radio and analog front-end. IC Role / Device Role / Timing Role: Dual-rail power manager supplying 1.8 V to MCU core and 3.3 V to BLE transceiver and sensor interface. Use Value: 65 µA quiescent current extends battery life beyond 7 days; LDO-monitored PG ensures reliable BLE reconnection after brownout recovery. | Use Scenario: Handheld ECG device powered directly from USB 5 V port. IC Role / Device Role / Timing Role: Primary voltage translator generating regulated 1.8 V (digital) and 3.3 V (analog/RF) from unregulated USB input. Use Value: 2.0 MHz switching frequency allows compact 3×3 mm layout; 137 mV LDO dropout maintains 3.3 V output down to 3.44 V input as USB cable resistance drops voltage. |
| Handheld Industrial Scanners | Low-Power IoT Edge Nodes |
Use Scenario: Barcode scanner with laser driver, image sensor, and Cortex-M4 host MCU. IC Role / Device Role / Timing Role: Power supervisor delivering 1.8 V to MCU and 3.3 V to CMOS image sensor and laser diode bias. Use Value: Independent SHDN1/SHDN2 pins allow laser driver to remain powered while MCU sleeps - enabling instant wake-up without full rail resequencing. | Use Scenario: Battery-operated environmental sensor node transmitting data via LoRaWAN. IC Role / Device Role / Timing Role: System PMIC providing 1.8 V to ultra-low-power MCU and 3.3 V to LoRa transceiver during TX bursts. Use Value: PWM-to-PFM auto-transition reduces IQ to 38 µA (buck only) during deep sleep - extending 2000 mAh battery life to >2 years. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303C-DF0EMF | Monitors both buck and LDO outputs for PG assertion; same pinout and electrical specs otherwise | Required when system reset must wait for stabilization of both rails - e.g., FPGA configurations needing simultaneous VCCINT and VCCAUX | Select TC1303C-DF0EMF only if dual-rail PG dependency is mandatory; TC1303B-DF0EMF simplifies reset logic when LDO rail is primary timing reference |
| TPS62231DRYR | Single-output 600 mA buck only; no integrated LDO or PG function - requires external LDO and comparator | Suitable for cost-sensitive designs where LDO is already present or noise sensitivity is low | Choose TPS62231DRYR only when adding discrete LDO + PG circuit is acceptable; TC1303B-DF0EMF reduces component count by 3+ parts and PCB area by ≥15 mm² |
Compared with TC1303C-DF0EMF, TC1303B-DF0EMF offers simpler reset timing by tying PG exclusively to VOUT2, reducing external logic. Against TPS62231DRYR, it delivers higher integration - eliminating separate LDO, PG comparator, and associated passives - at minimal cost premium for space- and reliability-critical portable designs.
Availability
TC1303B-DF0EMF is available at Aetrix Electronics and suitable for portable medical instruments, USB-powered diagnostic tools, handheld industrial scanners, and low-power IoT edge nodes requiring stable component supply across extended production lifecycles.
Supply support for TC1303B-DF0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and power management ICs for industrial, automotive, and consumer applications.
The TC1303 family was designed to deliver highly integrated, low-quiescent-current dual-rail power solutions for battery-powered portable electronics - prioritizing small footprint, thermal efficiency, and simplified system-level power sequencing.
FAQ
What output voltages does the TC1303B-DF0EMF provide?
The TC1303B-DF0EMF provides two fixed output voltages: 1.8 V at up to 500 mA from the synchronous buck regulator (VOUT1), and 3.3 V at up to 300 mA from the low-dropout linear regulator (VOUT2). These values are factory-set and confirmed by the "DF0" and "EMF" suffixes in the part number, per Microchip's standard ordering code.
How does the power-good (PG) function operate in the TC1303B-DF0EMF?
The TC1303B-DF0EMF features a push-pull PG output that monitors only the LDO output (VOUT2). It asserts high when VOUT2 reaches 94% of its nominal value and holds for a guaranteed 262 ms minimum timeout period. This behavior is specific to the TC1303B variant - unlike TC1303A (monitors buck only) or TC1303C (monitors both rails).
Can the TC1303B-DF0EMF operate from a single-cell lithium-ion battery?
Yes, the TC1303B-DF0EMF supports input voltages from 2.7 V to 5.5 V, fully covering the discharge range of a single-cell Li-ion battery (typically 4.2 V down to 2.7 V). Its 137 mV LDO dropout ensures stable 3.3 V output even at end-of-discharge, and its 65 µA quiescent current minimizes standby drain.
What package type and thermal requirements apply to the TC1303B-DF0EMF?
The TC1303B-DF0EMF uses a 10-pin 3×3 mm DFN package with exposed thermal pad (EP). The EP must be soldered to a dedicated AGND copper pour with ≥4 thermal vias to internal ground planes. Thermal resistance θJA is 41°C/W on a 4-layer board - enabling full 500 mA buck + 300 mA LDO load at +85°C ambient without derating.
Does the TC1303B-DF0EMF require external compensation components?
No, the TC1303B-DF0EMF has both the buck regulator and LDO internally compensated. No external RC networks or compensation capacitors are needed - only input/output ceramic capacitors (4.7 µF on VIN, 4.7 µF on VOUT1, 1 µF on VOUT2) and the 4.7 µH power inductor are required for basic operation.
TC1303B-DF0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 3V, 500mA
- Voltage/Current - Output 2:
- 2.8V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303B-DF0EMF FAQ
1.How can I place an order for TC1303B-DF0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303B-DF0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303B-DF0EMF reliable?
The price and inventory of TC1303B-DF0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303B-DF0EMF is usually 5 days.
3.What payment methods are accepted for TC1303B-DF0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303B-DF0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303B-DF0EMF?
TC1303B-DF0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303B-DF0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303B-DF0EMF?
For technical support, including TC1303B-DF0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303B-DF0EMF requirements.
6.How does Aetrix verify that TC1303B-DF0EMF is sourced from the original manufacturer or authorized distributors?
All TC1303B-DF0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303B-DF0EMF meets industry standards.
7.What is the process for return or replacement of TC1303B-DF0EMF?
All TC1303B-DF0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303B-DF0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303B-DF0EMF part is unused and in its original packaging.
Return procedure for TC1303B-DF0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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