Microchip Technology TC1303B-PD0EMFTR
- Part No.:
- TC1303B-PD0EMFTR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303B-PD0EMFTR.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303B-PD0EMFTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the LDO output only. It delivers 1.8 V at 500 mA (VOUT1) and 3.3 V at 300 mA (VOUT2), features 2.0 MHz fixed-frequency PWM operation, 65 µA typical quiescent current, and operates across –40°C to +125°C junction temperature. It is used in portable medical instruments requiring tightly regulated dual-rail supplies with reset signaling.
For engineers reviewing the TC1303B-PD0EMFTR datasheet, TC1303B-PD0EMFTR pinout, TC1303B-PD0EMFTR application, or TC1303B-PD0EMFTR equivalent, key selection criteria include LDO-monitored PG behavior, independent shutdown control per rail, 137 mV typical dropout at 200 mA, internal compensation, and DFN-10 (3×3 mm) package compatibility with space-constrained USB-powered systems.
Technical Context
The TC1303B-PD0EMFTR implements a synchronous buck converter with automatic transition from PWM to PFM mode under light load to minimize quiescent current, while its LDO output uses a single 1 µF ceramic capacitor for stability. The power-good signal is a push-pull output referenced solely to VOUT2 regulation with 94% threshold and 300 ms active timeout.
Its architecture separates control logic for each regulator: SHDN1 enables/disables the buck stage independently, SHDN2 controls the LDO, and UVLO triggers below 2.4 V on VIN. Thermal shutdown activates at 165°C with 10°C hysteresis, and both outputs include short-circuit and overtemperature protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output 1 (Buck) | 1.8 V @ 500 mA; adjustable range 0.8–4.5 V via external feedback resistors |
| Output 2 (LDO) | 3.3 V @ 300 mA; fixed output, 137 mV typical dropout at 200 mA |
| Power-Good Logic | Push-pull output monitoring VOUT2 only; asserts high when VOUT2 ≥ 94% of nominal |
| Quiescent Current | 65 µA typical total device IQ; 38 µA buck-only, 46 µA LDO-only in shutdown |
| Switching Frequency | 2.0 MHz fixed (1.6–2.4 MHz range); enables compact 4.7 µH inductor and low-noise operation |
| Operating Temp | –40°C to +125°C junction; validated for industrial and portable medical environments |
| Protection | UVLO (2.4–2.7 V), thermal shutdown (165°C), output short-circuit, and overcurrent on both rails |
Pinout & Package
TC1303B-PD0EMFTR is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP) connected to AGND. Pin 1 is SHDN2; pin numbering follows standard DFN orientation with EP as pin 11 (non-signaling).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown input | Active-high logic (>45% VIN); disables VOUT2 when low; independent of buck rail |
| 2 (VIN2) | LDO input supply | Accepts 2.7–5.5 V; must be tied closely to VIN1 to minimize noise coupling |
| 3 (VOUT2) | LDO regulated output | 3.3 V fixed; requires ≥1 µF ceramic capacitor to AGND for stability |
| 4 (PG) | Power-good indicator | Push-pull output asserting high when VOUT2 is within regulation; no external pull-up needed |
| 5 (AGND) | Analog ground reference | Must connect to clean analog ground plane; separate from PGND for noise isolation |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; tie to AGND only at single point near EP |
| 7 (LX) | Buck switch node | Connects to inductor; carries high di/dt; requires tight layout and Kelvin connection to PGND |
| 8 (VIN1) | Buck input supply | Accepts 2.7–5.5 V; shared with VIN2 in most designs; bypass with 4.7 µF ceramic |
| 9 (SHDN1) | Buck shutdown input | Active-high logic (>45% VIN); disables VOUT1 independently of VOUT2 |
| 10 (VFB1/VOUT1) | Buck feedback/sense | For fixed 1.8 V output, connect directly to VOUT1; for adjustable, use resistor divider to set voltage |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown control | SHDN1 and SHDN2 allow staggered power sequencing-e.g., hold LDO active while disabling buck during sleep |
| Internal compensation | Eliminates need for external compensation components on either regulator, reducing BOM count and layout area |
| Low-noise buck operation | 2.0 MHz switching frequency minimizes EMI filter size and avoids AM radio band; PFM mode reduces light-load ripple |
| LDO with ultra-low capacitor requirement | Stable with only 1 µF ceramic output capacitor-reduces board area and cost vs. traditional LDOs needing ≥10 µF |
| Push-pull PG output | Drives processor RESET directly without external pull-up; simplifies interface vs. open-drain alternatives requiring external bias |
Applications
| Portable Medical Instrumentation | USB-Powered Diagnostic Device |
|---|---|
Use Scenario: Handheld blood glucose meter with microcontroller, sensor ADC, and LCD display. IC Role / Device Role / Timing Role: Dual-rail power source delivering 1.8 V core voltage (buck) and 3.3 V I/O/peripheral rail (LDO), with PG driving MCU reset during brownout. Use Value: 65 µA quiescent current extends battery life; 137 mV LDO dropout ensures stable 3.3 V output even as USB input drops to 3.6 V. | Use Scenario: Plug-and-play ECG sensor module drawing power exclusively from USB 5 V. IC Role / Device Role / Timing Role: Primary PMIC converting 5 V USB to 1.8 V (MCU core) and 3.3 V (analog front-end, SD card interface). Use Value: Internal compensation and fixed 1.8/3.3 V outputs eliminate trimming components; DFN-10 footprint fits <100 mm² PCB area. |
| Industrial Handheld Terminal | Low-Power Wearable Health Monitor |
Use Scenario: Ruggedized barcode scanner operating in warehouses with wide ambient temperature swings. IC Role / Device Role / Timing Role: Dual-output regulator powering ARM Cortex-M core (1.8 V) and RF transceiver (3.3 V), with PG enabling hardware reset on supply sag. Use Value: –40°C to +125°C junction rating ensures reliability in uncontrolled environments; thermal shutdown prevents damage during extended operation. | Use Scenario: Coin-cell–powered pulse oximeter requiring minimal standby current and precise analog rail stability. IC Role / Device Role / Timing Role: Efficient dual-rail generator where buck powers digital subsystem and LDO supplies analog sensor chain with low PSRR-sensitive noise floor. Use Value: 62 dB PSRR at ≤100 Hz suppresses USB-switching noise on 3.3 V rail; 1.8 µV/√Hz output noise preserves ADC SNR. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP1826-3302E/DB | Single 3.3 V LDO only; no buck stage or PG output | Cannot replace TC1303B-PD0EMFTR's dual-rail capability; suitable only if buck function is handled externally | Select only when system already provides 1.8 V rail and only needs LDO backup/stabilization |
| TPS65023RGZR | Triple-output PMIC (2 buck + 1 LDO); 2.25 MHz switching; no LDO-monitored PG | PG monitors primary buck output only; lacks independent LDO shutdown and 137 mV dropout spec | Prefer when three rails are required and LDO PG monitoring is not critical to system reset logic |
Compared with MCP1826-3302E/DB and TPS65023RGZR, TC1303B-PD0EMFTR uniquely combines LDO-monitored push-pull PG, independent rail shutdown, and ultra-low capacitor LDO stability in a 3×3 mm DFN-making it optimal for space- and reset-integrity–constrained portable diagnostics.
Availability
TC1303B-PD0EMFTR is available at Aetrix Electronics and suitable for portable medical instrumentation, USB-powered diagnostic devices, and industrial handheld terminals requiring stable component supply with full traceability and long-term lifecycle support.
Supply support for TC1303B-PD0EMFTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
TC1303B-PD0EMFTR belongs to Microchip's TC1303 series of dual-output regulators designed specifically for battery-powered portable electronics needing efficient, compact, and sequenced dual-rail power with integrated power-good signaling.
FAQ
What output voltages does the TC1303B-PD0EMFTR provide?
The TC1303B-PD0EMFTR provides two fixed output voltages: 1.8 V from its synchronous buck regulator (VOUT1) and 3.3 V from its low-dropout linear regulator (VOUT2). These values are factory-set for this variant; the buck output can be adjusted to other values between 0.8 V and 4.5 V using external feedback resistors, but TC1303B-PD0EMFTR is configured for 1.8 V/3.3 V operation per its part number suffix.
How does the power-good (PG) output behave on the TC1303B-PD0EMFTR?
The TC1303B-PD0EMFTR features a push-pull PG output that monitors only the LDO output (VOUT2). It asserts high when VOUT2 reaches and maintains ≥94% of its nominal 3.3 V value, with a 300 ms active timeout period. Unlike TC1303A/C variants, TC1303B-PD0EMFTR's PG is not open-drain-no external pull-up is required, simplifying interface to microcontroller reset inputs.
What is the minimum input voltage required for the TC1303B-PD0EMFTR to regulate both outputs?
The TC1303B-PD0EMFTR requires a minimum input voltage of 2.7 V across VIN1 and VIN2. However, to maintain regulation, the input must also exceed the sum of each output voltage plus its respective dropout: ≥1.8 V + 0.28 V (buck dropout at 500 mA) and ≥3.3 V + 0.137 V (LDO dropout at 200 mA). Thus, for full 500 mA/300 mA load, VIN must be ≥3.437 V to sustain both rails simultaneously.
Can the TC1303B-PD0EMFTR operate with ceramic output capacitors only?
Yes-the TC1303B-PD0EMFTR is fully compatible with ceramic output capacitors. Its buck regulator requires ≥4.7 µF at VOUT1, and its LDO requires ≥1 µF at VOUT2, both rated for X5R/X7R dielectric with appropriate voltage derating. No tantalum or electrolytic capacitors are needed, supporting compact, high-reliability designs typical in portable medical devices.
Does the TC1303B-PD0EMFTR support independent enable control for each regulator?
Yes-TC1303B-PD0EMFTR provides independent shutdown pins: SHDN1 controls the buck regulator (VOUT1), and SHDN2 controls the LDO (VOUT2). Each is active-high with TTL-compatible thresholds (≥45% VIN to enable). This allows flexible power sequencing-for example, keeping VOUT2 active to power real-time clocks or sensors while disabling VOUT1 to reduce system-wide quiescent current.
TC1303B-PD0EMFTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 1.8V, 500mA
- Voltage/Current - Output 2:
- 3V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303B-PD0EMFTR FAQ
1.How can I place an order for TC1303B-PD0EMFTR through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303B-PD0EMFTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303B-PD0EMFTR reliable?
The price and inventory of TC1303B-PD0EMFTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303B-PD0EMFTR is usually 5 days.
3.What payment methods are accepted for TC1303B-PD0EMFTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303B-PD0EMFTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303B-PD0EMFTR?
TC1303B-PD0EMFTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303B-PD0EMFTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303B-PD0EMFTR?
For technical support, including TC1303B-PD0EMFTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303B-PD0EMFTR requirements.
6.How does Aetrix verify that TC1303B-PD0EMFTR is sourced from the original manufacturer or authorized distributors?
All TC1303B-PD0EMFTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303B-PD0EMFTR meets industry standards.
7.What is the process for return or replacement of TC1303B-PD0EMFTR?
All TC1303B-PD0EMFTR units undergo pre-shipment inspection (PSI). If there is an issue with TC1303B-PD0EMFTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303B-PD0EMFTR part is unused and in its original packaging.
Return procedure for TC1303B-PD0EMFTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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