Microchip Technology TC1303B-PF0EMF
- Part No.:
- TC1303B-PF0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303B-PF0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303B-PF0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the LDO output only. It delivers 1.8 V at 500 mA (VOUT1) and 3.3 V at 300 mA (VOUT2), features 2.0 MHz fixed-frequency PWM operation, 65 µA typical quiescent current, and operates across –40°C to +125°C for portable medical instruments and USB-powered devices.
For engineers reviewing the TC1303B-PF0EMF datasheet, TC1303B-PF0EMF pinout, TC1303B-PF0EMF application, or TC1303B-PF0EMF equivalent, key selection criteria include LDO-monitored PG functionality, independent shutdown control per rail, 137 mV typical dropout at 200 mA, internal compensation, and DFN-10 (3×3 mm) package compatibility with space-constrained battery-powered designs.
Technical Context
The TC1303B-PF0EMF implements a synchronous buck stage with PFM/PWM auto-transition and an independently controlled LDO stage-both internally compensated. Its power-good output is a push-pull signal tied exclusively to VOUT2 regulation (94% threshold, 300 ms delay), distinguishing it from TC1303A (buck-monitored) and TC1303C/TC1304 (dual-monitored or sequenced).
It supports adjustable or fixed VOUT1 (0.8–4.5 V or standard 0.8/1.2/1.5/1.8/2.5/3.3 V) and fixed VOUT2 (1.5/1.8/2.5/3.3 V). UVLO activates at 2.55 V (±0.15 V), thermal shutdown triggers at 165°C with 10°C hysteresis, and both outputs feature short-circuit and overtemperature protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output 1 (Buck) | 500 mA @ 1.8 V; fixed 2.0 MHz switching enables compact 4.7 µH inductor and low-noise operation |
| Output 2 (LDO) | 300 mA @ 3.3 V; 137 mV dropout at 200 mA allows operation with ≤3.437 V input for full load |
| Power-Good Logic | Push-pull PG output monitoring only VOUT2; asserts high when VOUT2 ≥94% of nominal (e.g., ≥3.102 V for 3.3 V) |
| Quiescent Current | 65 µA typical total IQ; enables >1-year battery life in always-on portable instrumentation |
| Input Voltage Range | 2.7–5.5 V; compatible with single-cell Li-ion (3.0–4.2 V) and USB 5 V sources |
| Operating Temperature | –40°C to +125°C junction; validated for industrial-grade handheld medical devices |
| Package | 10-pin 3×3 mm DFN; exposed pad tied to AGND for thermal dissipation (θJA = 41°C/W) |
Pinout & Package
TC1303B-PF0EMF is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP) connected to AGND. Pin numbering follows standard DFN orientation (pin 1 top-left, counterclockwise).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control | Active-high logic input; >45% VIN enables VOUT2; <15% VIN disables LDO with fast 31 µs wake-up |
| 2 (VIN2) | LDO input supply | Accepts 2.7–5.5 V; must be routed adjacent to VIN1 with minimal trace length to reduce noise coupling |
| 3 (VOUT2) | LDO regulated output | Delivers 3.3 V ±0.3%; requires ≥1 µF ceramic capacitor to AGND for stability |
| 4 (PG) | Power-good indicator | Push-pull output; drives processor RESET directly without external pull-up; 300 ms delay prevents premature release |
| 5 (AGND) | Analog ground reference | Separate ground node for feedback and bias circuits; must connect to low-impedance analog ground plane |
| 6 (PGND) | Power ground return | High-current return path for buck switch; isolated from AGND except at single-point star ground |
| 7 (LX) | Buck switch node | Connects to external inductor; carries high di/dt; requires tight layout with minimal loop area |
| 8 (VIN1) | Buck input supply | Accepts 2.7–5.5 V; shares input source with VIN2; requires 4.7 µF input capacitor |
| 9 (SHDN1) | Buck shutdown control | Independent active-high enable; allows staggered startup/shutdown of dual rails |
| 10 (VFB1/VOUT1) | Buck feedback or output | Configured as VOUT1 (fixed 1.8 V); no external divider needed; connects to output capacitor |
Key Features
| Feature | Design Value |
|---|---|
| Synchronous buck + LDO integration | Eliminates need for two discrete regulators; reduces BOM count and PCB area by >40% vs. discrete solution |
| Independent shutdown per output | Enables dynamic power gating: SHDN1 disables buck (VOUT1), SHDN2 disables LDO (VOUT2) without affecting other rail |
| PG monitors LDO only (TC1303B) | Ensures critical bias rail (e.g., 3.3 V I/O) is stable before system reset release-ideal for microcontroller I/O domain sequencing |
| Internal compensation | Removes requirement for external compensation network; simplifies design and improves reliability across temperature |
| Low 137 mV LDO dropout | Supports operation down to 3.437 V input at full 300 mA load on 3.3 V rail-maximizes usable battery voltage range |
| 2.0 MHz fixed-frequency PWM | Enables use of small 4.7 µH inductors and 4.7 µF output capacitors; reduces EMI filter complexity |
Applications
| Portable Medical Sensors | USB-Powered Test Equipment |
|---|---|
Use Scenario: Battery-operated glucose meter with MCU, analog front-end, and LCD display requiring clean 1.8 V core and stable 3.3 V I/O rails. IC Role / Device Role / Timing Role: TC1303B-PF0EMF provides dual regulated supplies; PG output releases MCU reset only after 3.3 V rail reaches 94% regulation. Use Value: 65 µA quiescent current extends AA battery life beyond 18 months; 137 mV LDO dropout preserves runtime during battery discharge. | Use Scenario: Handheld oscilloscope powered via USB 5 V, needing isolated 1.8 V ADC reference and 3.3 V FPGA I/O supply. IC Role / Device Role / Timing Role: TC1303B-PF0EMF generates both rails from common input; independent SHDN1/SHDN2 allow FPGA configuration before ADC power-up. Use Value: Internal compensation eliminates tuning effort; 2.0 MHz switching minimizes conducted EMI near sensitive analog measurement circuitry. |
| Industrial Handheld Terminals | Wearable Health Monitors |
Use Scenario: Ruggedized barcode scanner operating in –25°C to +70°C environments, requiring robust 1.8 V processor core and 3.3 V communication interface. IC Role / Device Role / Timing Role: TC1303B-PF0EMF delivers regulated outputs across full industrial temp range; PG ensures COM interface is ready before UART initialization. Use Value: –40°C to +125°C junction rating guarantees operation under cold storage and hot ambient conditions; UVLO prevents brownout resets below 2.55 V. | Use Scenario: ECG patch with ultra-low-power MCU, analog sensor front-end, and BLE radio-all powered from coin cell. IC Role / Device Role / Timing Role: TC1303B-PF0EMF supplies 1.8 V MCU core and 3.3 V BLE transceiver; PFM mode reduces IQ to <10 µA at light loads. Use Value: Automatic PWM-to-PFM transition cuts idle current by >85% vs. fixed-frequency operation-critical for multi-week wearable battery life. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303C-PP0EMF | Monitors both buck and LDO outputs with open-drain PG; same pinout and electrical specs otherwise | Required where system reset depends on stability of *both* rails (e.g., SoC with separate core/I/O domains) | Select TC1303C-PP0EMF only if dual-rail PG assertion is mandatory; otherwise TC1303B-PF0EMF offers simpler timing control |
| TPS65023RGZR | Triple-output (2 buck + 1 LDO); higher IQ (120 µA); QFN-24 package; I2C programmable output voltages | Suitable for complex SoC power trees requiring voltage sequencing and dynamic scaling | Choose TPS65023RGZR for scalable, multi-rail systems; TC1303B-PF0EMF remains optimal for cost-sensitive, fixed-voltage dual-rail designs |
Compared with TC1303C-PP0EMF, TC1303B-PF0EMF simplifies reset timing by tying PG exclusively to the LDO rail-reducing risk of false resets during buck transient events. Against TPS65023RGZR, it trades programmability and extra rail for lower cost, smaller footprint, and significantly lower quiescent current.
Availability
TC1303B-PF0EMF is available at Aetrix Electronics and suitable for portable medical sensors, USB-powered test equipment, and industrial handheld terminals requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for TC1303B-PF0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog components, and power management ICs, serving industrial, automotive, and consumer markets with high-reliability silicon solutions.
The TC1303 family targets space-constrained, battery-powered applications requiring dual regulated supplies with minimal external components-designed specifically for portable instrumentation, wearables, and USB peripherals.
FAQ
What output voltages does the TC1303B-PF0EMF provide?
The TC1303B-PF0EMF delivers a fixed 1.8 V output (VOUT1) from its synchronous buck regulator and a fixed 3.3 V output (VOUT2) from its low-dropout linear regulator. These values are factory-set and do not require external feedback resistors. The part number suffix "PF0" explicitly denotes the 1.8 V / 3.3 V configuration, confirmed in Microchip's DS21949C datasheet revision C.
How does the power-good (PG) function operate in the TC1303B-PF0EMF?
The TC1303B-PF0EMF features a push-pull PG output that monitors only the LDO output (VOUT2). It asserts high when VOUT2 reaches ≥94% of its nominal value (e.g., ≥3.102 V for 3.3 V) and maintains a 300 ms delay before activation. This behavior is specific to the TC1303B variant and differs from TC1303A (buck-monitored) and TC1303C (dual-monitored), as documented in DS21949C-page 3.
Can the TC1303B-PF0EMF be used with a single input source for both VIN1 and VIN2?
Yes-the TC1303B-PF0EMF is designed for shared input operation: VIN1 (buck input) and VIN2 (LDO input) must be connected together with short, low-inductance traces, as specified in DS21949C-page 5 and page 19. This configuration ensures proper UVLO coordination and avoids cross-regulation issues between the two regulators.
What is the thermal performance of the TC1303B-PF0EMF in its DFN package?
In the 10-pin 3×3 mm DFN package, the TC1303B-PF0EMF has a typical junction-to-ambient thermal resistance (θJA) of 41°C/W on a 4-layer board with internal ground plane and two vias in the exposed pad. Thermal shutdown activates at 165°C with 10°C hysteresis, and the device sustains continuous operation up to +125°C junction temperature, per DS21949C-page 10.
Does the TC1303B-PF0EMF require external compensation components?
No-the TC1303B-PF0EMF uses internally compensated control loops for both the buck and LDO regulators. This eliminates the need for external compensation networks (e.g., RC filters or type-II/III compensators), reducing design complexity, bill-of-materials cost, and layout sensitivity while maintaining stability across –40°C to +125°C, as stated in the Features section of DS21949C-page 1.
TC1303B-PF0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 1.8V, 500mA
- Voltage/Current - Output 2:
- 2.8V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303B-PF0EMF FAQ
1.How can I place an order for TC1303B-PF0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303B-PF0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303B-PF0EMF reliable?
The price and inventory of TC1303B-PF0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303B-PF0EMF is usually 5 days.
3.What payment methods are accepted for TC1303B-PF0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303B-PF0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303B-PF0EMF?
TC1303B-PF0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303B-PF0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303B-PF0EMF?
For technical support, including TC1303B-PF0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303B-PF0EMF requirements.
6.How does Aetrix verify that TC1303B-PF0EMF is sourced from the original manufacturer or authorized distributors?
All TC1303B-PF0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303B-PF0EMF meets industry standards.
7.What is the process for return or replacement of TC1303B-PF0EMF?
All TC1303B-PF0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303B-PF0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303B-PF0EMF part is unused and in its original packaging.
Return procedure for TC1303B-PF0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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