My Inquiry
My Account
Microchip Technology TC1303B-RD1EMF
- Part No.:
- TC1303B-RD1EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303B-RD1EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,240
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TC1303B-RD1EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of the LDO output only. It delivers 1.8 V (buck) and 3.3 V (LDO) fixed outputs, operates from 2.7–5.5 V input, achieves >90% peak efficiency at 2.0 MHz switching frequency, and supports -40°C to +125°C junction temperature - used in portable medical instruments and USB-powered devices.
For engineers reviewing the TC1303B-RD1EMF datasheet, TC1303B-RD1EMF pinout, TC1303B-RD1EMF application, or TC1303B-RD1EMF equivalent, key selection criteria include independent shutdown control for each regulator, 137 mV typical LDO dropout at 200 mA, 65 µA total quiescent current, push-pull PG output tied to VOUT2 regulation, and compatibility with 1 µF ceramic output capacitors on both rails.
Technical Context
The TC1303B-RD1EMF implements a fixed-frequency PWM buck stage (2.0 MHz nominal) that automatically transitions to PFM mode under light load to maintain ultra-low quiescent current, while its LDO stage uses internal compensation and requires no external components beyond a single 1 µF output capacitor. Both regulators feature independent enable inputs (SHDN1/SHDN2) and integrated protection including UVLO, overtemperature, and short-circuit limiting.
Its power-good function monitors only the LDO output (VOUT2), asserting a push-pull high-level signal when VOUT2 reaches ≥94% of nominal and holding it active for ≥262 ms after regulation loss - specifically designed for processor reset timing in battery-powered systems where auxiliary rail integrity is critical before system boot.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion (2.7–4.2 V) and USB 5 V supply without external pre-regulation |
| Buck Output Current | 500 mA maximum - sufficient for core voltage of ARM Cortex-M microcontrollers or FPGA I/O banks |
| LDO Output Current | 300 mA maximum - powers analog sensors, RF front-ends, or interface logic requiring low-noise bias |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - enables stable 3.3 V output from 3.437 V minimum input, minimizing headroom loss |
| Total Quiescent Current | 65 µA typical - extends battery life in always-on monitoring applications such as handheld diagnostics |
| Power-Good Output Type | Push-pull (not open-drain) - drives reset lines directly without external pull-up, simplifying PCB layout |
| Operating Junction Temp | -40°C to +125°C - qualified for industrial and automotive cabin-adjacent portable medical use |
Pinout & Package
TC1303B-RD1EMF is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), optimized for compact, thermally constrained designs. Pin 1 is SHDN2; pin 10 is PG. The EP must be connected to AGND for thermal performance and electrical reference integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control input | Active-high logic input (>45% VIN); enables/disables 300 mA LDO independently of buck stage |
| 2 (VIN2) | LDO input supply | Accepts same input as VIN1 (buck input); must be routed with minimal trace length to reduce noise coupling |
| 3 (VOUT2) | LDO regulated output | Delivers fixed 3.3 V; requires ≥1 µF ceramic capacitor to AGND for stability and transient response |
| 4 (PG) | Power-good status output | Push-pull output indicating VOUT2 ≥94% of 3.3 V; asserts high for ≥262 ms after regulation loss |
| 5 (AGND) | Analog ground reference | Must connect to clean analog ground plane; separates noise-sensitive feedback paths from power return |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; requires low-inductance connection to input/output caps |
| 7 (LX) | Buck switch node | Connects to external 4.7 µH inductor; carries high di/dt; must minimize loop area to reduce EMI |
| 8 (VIN1) | Buck input supply | Primary input for 500 mA buck stage; shares source with VIN2 but routed separately for layout control |
| 9 (SHDN1) | Buck shutdown control input | Active-high logic input (>45% VIN); enables/disables buck regulator independently of LDO |
| 10 (VFB1/VOUT1) | Buck feedback or output sense | Configured as VOUT1 for fixed-output variants; connects directly to 1.8 V buck output for regulation |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown control | SHDN1 and SHDN2 allow staged power sequencing - e.g., disable LDO first during shutdown to prevent backfeed into buck output |
| Internally compensated LDO | Eliminates need for external compensation network; reduces BOM count and layout sensitivity for 300 mA output |
| Automatic PWM-to-PFM transition | Maintains <100 µA total IQ under light load without firmware intervention - critical for battery runtime in sleep modes |
| Push-pull PG output | Drives reset logic directly without pull-up resistor; ensures deterministic timing for microcontroller reset assertion |
| Low-noise buck operation | 2.0 MHz fixed frequency enables use of small 4.7 µH inductors and 4.7 µF ceramic input/output caps - reduces solution size by >30% vs. 500 kHz designs |
Applications
| Portable Medical Diagnostics | USB-Powered Test Equipment |
|---|---|
Use Scenario: Handheld blood glucose meter with LCD display, Bluetooth LE radio, and precision ADC. IC Role / Device Role / Timing Role: Provides 1.8 V core voltage for MCU and 3.3 V bias for analog front-end and BLE transceiver; PG signal triggers system reset if LDO fails during self-test. Use Value: 137 mV LDO dropout enables reliable 3.3 V output down to 3.437 V input - extending usable range of single-cell Li-ion battery from 3.6 V to 3.45 V. |
Use Scenario: Portable oscilloscope probe powered via USB-C (5 V) with isolated analog signal chain. IC Role / Device Role / Timing Role: Generates clean 1.8 V for FPGA configuration and 3.3 V for op-amp buffers; PG monitors LDO to ensure analog section is stable before enabling acquisition. Use Value: Push-pull PG eliminates external pull-up, reducing component count and board area - critical for miniaturized probe housing. |
| Industrial Handheld Terminals | Wearable Health Monitors |
Use Scenario: Rugged barcode scanner with RFID reader, OLED display, and vibration motor. IC Role / Device Role / Timing Role: Supplies 1.8 V to ARM Cortex-M4 and 3.3 V to RFID IC and display driver; independent SHDN2 allows dynamic LDO disable during sleep to cut leakage. Use Value: 65 µA total IQ minimizes standby current - enabling >12-month battery life on 800 mAh coin cell with periodic wake-ups. |
Use Scenario: ECG patch with ultra-low-power MCU, analog sensor front-end, and BLE transmitter. IC Role / Device Role / Timing Role: Delivers 1.8 V to digital core and 3.3 V to instrumentation amplifier; PG signal gates BLE transmission until analog rail is verified. Use Value: Internally compensated LDO removes need for external capacitor and resistor - saving 1.2 mm² PCB area in space-constrained wearable form factor. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303C-RD1EMF | Monitors both buck and LDO outputs for PG assertion; same pinout and package | Required when system reset must depend on integrity of both rails - e.g., FPGA with separate core/I/O supplies | Select TC1303C-RD1EMF only if dual-rail PG monitoring is mandatory; otherwise TC1303B-RD1EMF offers simpler reset logic. |
| TPS62231DRYR | Single-output 600 mA buck only; no integrated LDO or PG function - requires external LDO and supervisor IC | Suitable for designs where LDO is not needed or can be added discretely; lacks integrated sequencing or rail monitoring | Choose TPS62231DRYR only when cost-per-rail optimization outweighs integration benefits - adds ≥3 extra components and layout complexity. |
Compared with TC1303C-RD1EMF, TC1303B-RD1EMF reduces system-level supervision complexity by tying PG exclusively to the LDO, lowering BOM count and eliminating false resets due to transient buck droop. Versus TPS62231DRYR, it delivers complete dual-rail power management in one chip - cutting PCB area by ~25% and removing timing coordination between discrete regulators.
Availability
TC1303B-RD1EMF is available at Aetrix Electronics and suitable for portable medical diagnostics, USB-powered test equipment, and industrial handheld terminals requiring stable component supply across extended product lifecycles.
Supply support for TC1303B-RD1EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The TC1303 family was engineered to deliver highly integrated, low-quiescent-power dual-rail regulation for space- and battery-constrained portable electronics - emphasizing simplicity, reliability, and minimal external component count.
FAQ
What output voltages does the TC1303B-RD1EMF provide?
The TC1303B-RD1EMF provides fixed 1.8 V from its synchronous buck regulator (VOUT1) and fixed 3.3 V from its low-dropout linear regulator (VOUT2). These values are factory-trimmed and do not require external feedback resistors. The device does not support adjustable output configurations - the RD1 suffix denotes this specific 1.8 V / 3.3 V variant.
How does the power-good (PG) output of the TC1303B-RD1EMF behave?
The TC1303B-RD1EMF features a push-pull PG output that monitors only the LDO output (VOUT2). It asserts high when VOUT2 reaches ≥94% of 3.3 V and remains high for ≥262 ms after VOUT2 falls below 92% of regulation. This behavior is distinct from TC1303A/C variants, which use open-drain PG and monitor different rails.
Can the buck and LDO outputs of the TC1303B-RD1EMF be controlled independently?
Yes - the TC1303B-RD1EMF provides independent enable inputs: SHDN1 controls the 500 mA buck regulator, and SHDN2 controls the 300 mA LDO. Each accepts active-high logic (>45% VIN) and supports separate sequencing, allowing the LDO to remain active while the buck is disabled - useful for retaining analog bias during digital core sleep.
What is the minimum input voltage required for the TC1303B-RD1EMF to regulate both outputs?
The TC1303B-RD1EMF requires VIN ≥ 2.7 V minimum, but practical regulation depends on dropout margins: for 3.3 V LDO output, VIN must exceed 3.3 V + 137 mV = 3.437 V at 200 mA load. For 1.8 V buck output, VIN must exceed 1.8 V + 280 mV = 2.08 V. Thus, full dual-rail operation begins at ~3.44 V input under typical load conditions.
Does the TC1303B-RD1EMF require external compensation components?
No - both the buck regulator and LDO in the TC1303B-RD1EMF are internally compensated. The buck stage requires only an external 4.7 µH inductor and input/output ceramic capacitors; the LDO requires only a 1 µF ceramic capacitor on VOUT2. No external RC networks or compensation pins are needed, simplifying design and validation.
TC1303B-RD1EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 1.6V, 500mA
- Voltage/Current - Output 2:
- 3V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303B-RD1EMF FAQ
1.How can I place an order for TC1303B-RD1EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303B-RD1EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303B-RD1EMF reliable?
The price and inventory of TC1303B-RD1EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303B-RD1EMF is usually 5 days.
3.What payment methods are accepted for TC1303B-RD1EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303B-RD1EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303B-RD1EMF?
TC1303B-RD1EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303B-RD1EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303B-RD1EMF?
For technical support, including TC1303B-RD1EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303B-RD1EMF requirements.
6.How does Aetrix verify that TC1303B-RD1EMF is sourced from the original manufacturer or authorized distributors?
All TC1303B-RD1EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303B-RD1EMF meets industry standards.
7.What is the process for return or replacement of TC1303B-RD1EMF?
All TC1303B-RD1EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303B-RD1EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303B-RD1EMF part is unused and in its original packaging.
Return procedure for TC1303B-RD1EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TC1303B-RD1EMF Tags
-
TPS6521905RHBR
Texas Instruments
-
MIC3385YHL-TR
Microchip Technology
-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments
-
A4402KLPTR-T
Allegro MicroSystems
-
BD71847AMWV-E2
ROHM Semiconductor
-
ADP5040ACPZ-1-R7
Analog Devices Inc.
-
LT3048IDC#TRPBF
Analog Devices Inc.
-
ADP5037ACPZ-R7
Analog Devices Inc.
-
XRP7714ILB-F
MaxLinear, Inc.
-
LTC3260EDE#TRPBF
Analog Devices Inc.
-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
