Microchip Technology TC1303B-SD0EMFTR

Overview

TC1303B-SD0EMFTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring specifically of the LDO output. It delivers 1.8 V at 500 mA (VOUT1) and 3.3 V at 300 mA (VOUT2), operates from 2.7–5.5 V input, features 65 µA typical quiescent current, and supports -40°C to +125°C junction temperature - ideal for battery-powered portable computing and medical instrumentation.

For engineers reviewing the TC1303B-SD0EMFTR datasheet, TC1303B-SD0EMFTR pinout, TC1303B-SD0EMFTR application, or TC1303B-SD0EMFTR equivalent, key selection criteria include its LDO-monitored PG output, independent shutdown control per rail, 2.0 MHz fixed-frequency PWM operation, 137 mV typical dropout at 200 mA (VOUT2), and compatibility with 1 µF ceramic output capacitance on the LDO.

Technical Context

The TC1303B-SD0EMFTR implements a synchronous buck converter with PFM/PWM auto-transition and an internally compensated LDO, both sharing a common analog ground (AGND) and thermally optimized DFN package. Its power-good (PG) signal is a push-pull output tied exclusively to VOUT2 regulation, with 94% threshold high and 89% threshold low, plus 300 ms active delay - designed for processor reset sequencing in dual-rail systems.

Control logic enables independent enable/disable of buck (SHDN1) and LDO (SHDN2) outputs; UVLO activates below 2.4 V, thermal shutdown triggers at 165°C, and protection includes overcurrent, short-circuit, and overtemperature on both outputs. The LX pin drives external inductor switching with 450 mΩ typical R_DS(on) for both P- and N-channel MOSFETs.

Key Specifications

Pinout & Package

TC1303B-SD0EMFTR is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), rated θ_JA = 41°C/W on a 4-layer board with internal ground plane and 2 vias under EP. Pin 1 is SHDN2; pin 10 is PG. The exposed pad must be soldered to AGND for thermal and electrical integrity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output PMIC applications.

Compared with TPS65023BRSBR and RT8059ZSP, TC1303B-SD0EMFTR uniquely combines LDO-monitored PG, ultra-low IQ, and minimal external component count in a 3×3 mm DFN - making it optimal for space- and battery-life-constrained dual-rail applications where a dedicated 3.3 V bias rail is required without added complexity.

Availability

TC1303B-SD0EMFTR is available at Aetrix Electronics and suitable for portable medical instrumentation, USB-powered embedded systems, and ultra-thin portable computers requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for TC1303B-SD0EMFTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog devices, and power management ICs, with broad industrial and automotive qualification programs.

The TC1303 family was engineered to deliver highly integrated, low-quiescent-current dual-rail power solutions for battery-operated portable electronics - emphasizing simplicity, thermal robustness, and minimal external component count.

FAQ

What is the function of the PG pin on the TC1303B-SD0EMFTR?

The PG (Power-Good) pin on the TC1303B-SD0EMFTR is a push-pull output that monitors only the LDO output (VOUT2). It asserts high when VOUT2 reaches ≥94% of its nominal value (e.g., ≥3.102 V for 3.3 V output) and includes a built-in 300 ms delay to ensure stable regulation before signaling readiness. This behavior is specific to the TC1303B variant and differs from TC1303A/C/TC1304, which use open-drain PG.

Can the TC1303B-SD0EMFTR generate adjustable output voltages?

The TC1303B-SD0EMFTR is a fixed-output variant: VOUT1 = 1.8 V and VOUT2 = 3.3 V. While the broader TC1303 family includes adjustable versions (e.g., TC1303B-AD0EMFTR), this specific part number has factory-trimmed internal feedback resistors - no external resistor divider is used or supported. The VFB1/VOUT1 pin is connected directly to the 1.8 V output node.

What package type does the TC1303B-SD0EMFTR use, and how is thermal performance managed?

The TC1303B-SD0EMFTR uses a 10-pin 3×3 mm DFN package with exposed thermal pad (EP). Thermal resistance is θ_JA = 41°C/W on a 4-layer PCB with internal ground plane and two thermal vias under the EP. To achieve rated 500 mA buck and 300 mA LDO output, the EP must be soldered to AGND; insufficient thermal relief will trigger 165°C thermal shutdown under sustained load.

How does shutdown control work on the TC1303B-SD0EMFTR?

The TC1303B-SD0EMFTR features two independent shutdown inputs: SHDN1 controls the buck regulator (VOUT1), and SHDN2 controls the LDO (VOUT2). Both are active-high logic inputs requiring >45% of VIN to enable; pulling either low disables its respective output while leaving the other unaffected. This allows flexible power sequencing - for example, keeping VOUT2 active to power always-on peripherals while shutting down VOUT1 during MCU sleep.

Is the TC1303B-SD0EMFTR compatible with ceramic output capacitors?

Yes - the TC1303B-SD0EMFTR is fully compatible with ceramic capacitors. The buck output requires ≥4.7 µF at VIN and VOUT1; the LDO output requires only ≥1 µF at VOUT2. Ceramic types (X5R/X7R) are recommended for both positions due to low ESR and stability across temperature. No tantalum or electrolytic capacitors are needed, reducing size and improving reliability.