Microchip Technology TC1303B-VS0EMF
- Part No.:
- TC1303B-VS0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303B-VS0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:4,699
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Product details
Overview
TC1303B-VS0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with the power-good (PG) output monitoring only the LDO output (VOUT2). It delivers 1.8 V on VOUT1 and 3.3 V on VOUT2, operates from 2.7–5.5 V input, and features 65 µA typical quiescent current and 300 ms PG delay - optimized for portable medical instruments and USB-powered devices requiring sequenced bias rails.
For engineers reviewing the TC1303B-VS0EMF datasheet, TC1303B-VS0EMF pinout, TC1303B-VS0EMF application, or TC1303B-VS0EMF equivalent, key selection criteria include its LDO-monitored PG function, independent SHDN1/SHDN2 control, 2.0 MHz fixed-frequency PWM operation, 137 mV typical dropout at 200 mA on VOUT2, and compatibility with 1 µF ceramic output capacitors for minimal board area.
Technical Context
The TC1303B-VS0EMF implements a synchronous buck stage with PFM/PWM auto-transition and internal compensation, delivering up to 500 mA at adjustable or fixed VOUT1 (0.8–4.5 V). Its LDO stage provides 300 mA with 137 mV typical dropout at 200 mA and ±0.3% output voltage tolerance over temperature.
Power-good logic is configured as a push-pull output tied exclusively to VOUT2 regulation (94% threshold, 300 ms delay), distinguishing it from TC1303A (buck-monitored) and TC1303C/TC1304 (dual-monitored or sequenced). UVLO activates at 2.55 V nominal with 200 mV hysteresis, and thermal shutdown triggers at 165°C with 10°C hysteresis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VOUT1 | 1.8 V fixed output; enables core voltage supply for low-power processors without external feedback resistors. |
| VOUT2 | 3.3 V fixed output; powers I/O, USB PHY, or sensors with <±0.3% tolerance and 25 ppm/°C tempco. |
| IOUT1 Max | 500 mA; supports mid-tier ARM Cortex-M microcontrollers or FPGA I/O banks under peak load. |
| IOUT2 Max | 300 mA; sufficient for multiple digital peripherals (e.g., USB transceivers, ADCs, SPI flash) simultaneously. |
| Quiescent Current | 65 µA typical; extends battery life in always-on portable medical monitors during sleep mode. |
| PG Function | Push-pull output monitoring only VOUT2; asserts high when VOUT2 reaches 94% of 3.3 V, with 300 ms delay for reliable processor reset timing. |
| Operating Temp | -40°C to +125°C junction; qualified for industrial-grade handheld diagnostics equipment deployed in variable ambient conditions. |
Pinout & Package
TC1303B-VS0EMF is housed in a 10-lead 3×3 mm DFN package with exposed thermal pad (EP), rated θJA = 41°C/W on a 4-layer board with internal ground plane and 2 vias under EP. Pin 11 (EP) must be soldered to AGND for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control | Active-high logic input (>45% VIN); enables/disables VOUT2 independently of buck stage for flexible power sequencing. |
| 2 (VIN2) | LDO input supply | Accepts same 2.7–5.5 V source as VIN1; requires short trace routing to minimize noise coupling into LDO input. |
| 3 (VOUT2) | LDO regulated output | Delivers 3.3 V @ 300 mA; requires ≥1 µF ceramic capacitor to AGND for stability and transient response. |
| 4 (PG) | Power-good status | Push-pull output indicating VOUT2 regulation; drives reset line directly without pull-up resistor. |
| 5 (AGND) | Analog ground reference | Must connect to clean analog ground plane; separates noise-sensitive feedback paths from power return currents. |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; routed separately from AGND and joined at single point near input capacitor. |
| 7 (LX) | Buck switch node | Connects to external 4.7 µH inductor; carries high di/dt switching current - requires tight loop layout with low-inductance path to PGND. |
| 8 (VIN1) | Buck input supply | Primary input for synchronous buck stage; shares source with VIN2 but must be decoupled locally with 4.7 µF ceramic capacitor. |
| 9 (SHDN1) | Buck shutdown control | Active-high logic input (>45% VIN); allows independent enable/disable of VOUT1 without affecting VOUT2. |
| 10 (VFB1/VOUT1) | Buck feedback/sense | Fixed 1.8 V output - internally connected; no external divider required, simplifying layout and reducing BOM count. |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown control | SHDN1 and SHDN2 allow separate enable/disable of buck (VOUT1) and LDO (VOUT2), enabling dynamic rail gating in multi-sleep-state systems. |
| Internally compensated regulators | Eliminates need for external compensation components on both buck and LDO loops - reduces design cycle time and PCB area. |
| Low-noise 2.0 MHz PWM operation | Enables use of small 4.7 µH inductors and 4.7 µF input/output capacitors, minimizing solution size for space-constrained portable enclosures. |
| Ultra-low dropout LDO | 137 mV typical dropout at 200 mA allows operation down to VIN2 = 3.437 V while maintaining 3.3 V output - critical for Li-ion battery discharge tail-end. |
| Integrated protection suite | Includes undervoltage lockout (2.55 V), overtemperature shutdown (165°C), and output short-circuit limiting - reduces need for external fault management circuitry. |
Applications
| USB-Powered Diagnostic Tool | Portable ECG Monitor |
|---|---|
Use Scenario: Handheld device powered via USB 5 V input, requiring clean 3.3 V for analog front-end and 1.8 V for low-power MCU core. IC Role / Device Role / Timing Role: Dual-rail PMIC providing isolated, low-noise biasing with PG-driven system reset upon LDO stabilization. Use Value: 1 µF LDO output capacitor and integrated compensation reduce component count by 4 vs. discrete solutions, while 65 µA IQ extends battery runtime between USB charges. | Use Scenario: Battery-operated electrocardiogram recorder with real-time signal processing and Bluetooth LE transmission. IC Role / Device Role / Timing Role: Primary power controller delivering sequenced startup: LDO powers analog sensor interface first, then buck supplies MCU core after PG assertion. Use Value: LDO-monitored PG ensures analog signal chain is fully stabilized before digital processing begins - eliminating baseline drift during boot. |
| Industrial Handheld Terminal | Wearable Health Sensor Hub |
Use Scenario: Ruggedized field terminal using Li-ion battery (2.7–4.2 V) and needing robust 3.3 V I/O rail plus 1.8 V logic rail across wide temperature range. IC Role / Device Role / Timing Role: Dual-output regulator with -40°C to +125°C operation and 137 mV LDO dropout enabling full functionality down to 3.437 V battery voltage. Use Value: Thermal shutdown (165°C) and UVLO (2.55 V) protect against overvoltage/overheating in unventilated enclosures - improving field reliability. | Use Scenario: Ultra-low-power wearable collecting biometric data, spending >90% time in deep sleep with periodic wake-ups. IC Role / Device Role / Timing Role: Power manager enabling independent shutdown of MCU core (VOUT1) while keeping sensor interface (VOUT2) active for motion-triggered wake-up. Use Value: Independent SHDN1/SHDN2 control reduces average system current to sub-µA levels during sleep - extending coin-cell battery life beyond 12 months. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP16311-H/MS | Single-output 600 mA buck only; no integrated LDO or PG monitoring - requires external LDO and reset supervisor. | Suitable only when VOUT2 rail is omitted or sourced externally; lacks LDO-monitored PG for autonomous reset timing. | Select when cost sensitivity outweighs integration benefit and system already includes discrete LDO/reset IC. |
| TPS65023RSBR | Triple-output PMIC (2 buck + 1 LDO); higher IQ (120 µA), larger 4×4 QFN package, and PG monitors buck outputs only - not LDO. | Supports more complex SoC power trees but cannot replicate TC1303B-VS0EMF's LDO-centric PG assertion for analog-first boot sequences. | Choose when scaling to multi-core processors with additional voltage domains, accepting larger footprint and higher quiescent draw. |
Compared with MCP16311-H/MS and TPS65023RSBR, TC1303B-VS0EMF uniquely combines LDO-monitored push-pull PG, independent dual-rail shutdown, and ultra-low 65 µA IQ in a compact 3×3 DFN - making it optimal for portable medical and USB-powered devices where analog rail integrity and battery longevity are primary constraints.
Availability
TC1303B-VS0EMF is available at Aetrix Electronics and suitable for USB-powered diagnostic tools, portable ECG monitors, and industrial handheld terminals requiring stable component supply with guaranteed long-term availability and consistent parametric performance.
Supply support for TC1303B-VS0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
TC1303B-VS0EMF belongs to Microchip's TC1303 series of dual-output PMICs designed specifically for space- and power-constrained portable electronics requiring tightly regulated, low-noise dual-rail power with intelligent power-good signaling.
FAQ
What is the power-good (PG) behavior of TC1303B-VS0EMF?
The TC1303B-VS0EMF features a push-pull PG output that monitors only the LDO output (VOUT2). It asserts high when VOUT2 reaches 94% of its nominal 3.3 V value, with a fixed 300 ms delay after regulation is achieved. This behavior is hardwired for TC1303B variants and differs from TC1303A (buck-monitored) and TC1303C/TC1304 (dual-monitored or sequenced). The PG pin can directly drive a processor reset line without an external pull-up resistor.
Can TC1303B-VS0EMF operate from a single Li-ion cell?
Yes, TC1303B-VS0EMF supports input voltages from 2.7 V to 5.5 V, covering the full discharge curve of a single Li-ion cell (typically 4.2 V down to ~2.8 V). Its LDO stage maintains 3.3 V output with only 137 mV dropout at 200 mA, meaning it remains functional until VIN2 drops to 3.437 V - well within the usable battery range. The buck stage similarly regulates 1.8 V down to VIN1 = 2.7 V.
What are the minimum external components required for TC1303B-VS0EMF?
TC1303B-VS0EMF requires only five external components for basic operation: a 4.7 µH power inductor on LX, a 4.7 µF ceramic input capacitor on VIN1, a 4.7 µF ceramic output capacitor on VOUT1, a 1 µF ceramic output capacitor on VOUT2, and a 0 Ω or NC connection on SHDN1/SHDN2 if always enabled. No external compensation or feedback resistors are needed due to internal compensation and fixed 1.8 V/3.3 V outputs.
How does TC1303B-VS0EMF handle light-load efficiency?
TC1303B-VS0EMF automatically transitions from fixed-frequency 2.0 MHz PWM mode to pulse-frequency modulation (PFM) mode under light loads on the buck output (VOUT1). This reduces switching losses and maintains high efficiency (<80%) even at 1 mA load, while keeping total device quiescent current at just 65 µA typical - critical for battery-powered applications with intermittent activity.
Is TC1303B-VS0EMF pin-compatible with other TC1303 variants?
No, TC1303B-VS0EMF is not pin-compatible with TC1303A, TC1303C, or TC1304. While all share the same 10-pin DFN/MSOP footprint and pin numbering, the SHDN2 pin (Pin 1) on TC1303B serves as LDO-only shutdown, whereas TC1304 uses Pin 1 as a combined shutdown input for sequencing. Additionally, PG output type (push-pull vs. open-drain) and internal monitoring logic differ - requiring PCB redesign for substitution.
TC1303B-VS0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- 1.2V, 500mA
- Voltage/Current - Output 2:
- 1.5V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303B-VS0EMF FAQ
1.How can I place an order for TC1303B-VS0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303B-VS0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303B-VS0EMF reliable?
The price and inventory of TC1303B-VS0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303B-VS0EMF is usually 5 days.
3.What payment methods are accepted for TC1303B-VS0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303B-VS0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303B-VS0EMF?
TC1303B-VS0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303B-VS0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303B-VS0EMF?
For technical support, including TC1303B-VS0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303B-VS0EMF requirements.
6.How does Aetrix verify that TC1303B-VS0EMF is sourced from the original manufacturer or authorized distributors?
All TC1303B-VS0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303B-VS0EMF meets industry standards.
7.What is the process for return or replacement of TC1303B-VS0EMF?
All TC1303B-VS0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303B-VS0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303B-VS0EMF part is unused and in its original packaging.
Return procedure for TC1303B-VS0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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