Microchip Technology TC1303B-ZA0EMF
- Part No.:
- TC1303B-ZA0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303B-ZA0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:3,856
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TC1303B-ZA0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with the power-good (PG) output monitoring only the LDO output (VOUT2). It delivers 1.8 V on VOUT1 and 3.3 V on VOUT2, operates from 2.7–5.5 V input, achieves >90% efficiency at heavy load, and features 65 µA typical quiescent current. It targets portable battery-powered systems requiring tightly regulated dual rails.
For engineers reviewing the TC1303B-ZA0EMF datasheet, TC1303B-ZA0EMF pinout, TC1303B-ZA0EMF application, or TC1303B-ZA0EMF equivalent, key selection criteria include LDO-monitored PG behavior, independent SHDN1/SHDN2 control, 2.0 MHz fixed-frequency PWM operation, 137 mV typical dropout at 200 mA for VOUT2, and DFN-10 package compatibility with thermal pad grounding.
Technical Context
The TC1303B-ZA0EMF implements a synchronous buck converter with PFM/PWM auto-transition and an internally compensated LDO - both outputs are independently shutdown via dedicated logic inputs (SHDN1 and SHDN2). Its PG output is push-pull and asserts only when VOUT2 reaches ≥94% of nominal, with 300 ms delay used for processor reset sequencing.
It uses a fixed 2.0 MHz switching frequency under heavy load, supports adjustable (0.8–4.5 V) or standard fixed VOUT1 voltages, and offers standard fixed VOUT2 options including 1.5 V, 1.8 V, 2.5 V, and 3.3 V. The device integrates UVLO (2.55 V typ), overtemperature protection (165 °C), and short-circuit protection on both outputs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Configuration | Dual-output: 500 mA buck (VOUT1) + 300 mA LDO (VOUT2) |
| VOUT1 Voltage | Fixed 1.8 V - enables direct core supply for low-voltage processors without external feedback resistors |
| VOUT2 Voltage | Fixed 3.3 V - provides stable I/O or peripheral bias rail with 137 mV dropout at 200 mA |
| Power-Good Monitoring | PG monitors VOUT2 only (TC1303B-specific) with 94% threshold and push-pull output - simplifies reset timing for LDO-dependent subsystems |
| Quiescent Current | 65 µA typical total IQ - extends battery life in always-on portable devices |
| Switching Frequency | 2.0 MHz fixed PWM (heavy load), auto-transition to PFM (light load) - enables compact 4.7 µH inductor and low output ripple |
| Operating Temp Range | −40°C to +125°C junction - supports industrial and extended-temperature embedded applications |
Pinout & Package
TC1303B-ZA0EMF is housed in a thermally enhanced 10-pin 3×3 mm DFN package with exposed thermal pad (EP), requiring connection to AGND for optimal thermal performance and noise immunity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1: SHDN2 | LDO shutdown control input | Active-high logic (>45% VIN); enables independent LDO disable for dynamic power gating |
| 2: VIN2 | LDO input supply | Accepts same 2.7–5.5 V input as VIN1; must be routed with minimal trace length to VIN1 |
| 3: VOUT2 | 300 mA LDO regulated output | Delivers fixed 3.3 V; requires ≥1 µF ceramic capacitor to AGND for stability |
| 4: PG | Power-good status output | Push-pull, active-high when VOUT2 ≥94% of 3.3 V; 300 ms delay enables reliable processor reset |
| 5: AGND | Analog ground reference | Must connect to clean analog ground plane; separate from PGND for noise isolation |
| 6: PGND | Power ground return | High-current return path for buck switch node; ties to AGND only at single point near EP |
| 7: LX | Buck switch node | Connects to external 4.7 µH inductor; carries high di/dt - requires tight layout and Kelvin routing |
| 8: VIN1 | Buck input supply | Primary input for buck stage; shares source with VIN2; requires local 4.7 µF ceramic decoupling |
| 9: SHDN1 | Buck shutdown control input | Active-high logic (>45% VIN); allows independent buck disable without affecting LDO |
| 10: VFB1/VOUT1 | Buck feedback or output | Configured as VOUT1 pin for fixed 1.8 V version - connects directly to output capacitor |
Key Features
| Feature | Design Value |
|---|---|
| Independent dual shutdown | SHDN1 and SHDN2 allow granular power sequencing - e.g., keep LDO active while disabling buck during sleep |
| Internally compensated regulators | Eliminates need for external compensation networks on either output - reduces BOM count and layout complexity |
| Low-noise 2.0 MHz PWM | Enables use of small 4.7 µH inductors and avoids AM radio band interference - critical for handheld medical instruments |
| 1 µF LDO output capacitor | Minimizes board area and cost while maintaining stability - compatible with space-constrained USB-powered devices |
| Push-pull PG output | Drives reset lines directly without pull-up resistor - simplifies interface to microcontrollers requiring active-high reset |
Applications
| Cellular Phones | Portable Computers |
|---|---|
Use Scenario: Dual-rail power for baseband processor (1.8 V core) and RF transceiver I/O (3.3 V). IC Role / Device Role / Timing Role: Primary PMIC delivering regulated VDD_CORE and VDD_IO with synchronized startup and PG-driven reset assertion. Use Value: Independent SHDN1/SHDN2 enables dynamic core voltage scaling while maintaining I/O rail integrity - reducing system-level power by up to 35% in idle states. | Use Scenario: Powering SoC subsystems in ultra-thin notebooks with strict thermal envelope limits. IC Role / Device Role / Timing Role: Dual-output regulator supplying CPU core (1.8 V) and memory interface (3.3 V), with PG enabling safe boot sequence. Use Value: 2.0 MHz switching and DFN-10 package achieve >90% efficiency at 500 mA while limiting θJA to 41 °C/W - preventing thermal throttling. |
| USB-Powered Devices | Handheld Medical Instruments |
Use Scenario: Bus-powered diagnostic tools drawing power exclusively from 5 V USB port. IC Role / Device Role / Timing Role: Efficiently steps down 5 V USB input to 1.8 V and 3.3 V rails, with PG ensuring firmware loads only after stable power. Use Value: 65 µA quiescent current extends battery-free operation time; 2.7–5.5 V input range accommodates USB voltage tolerance (4.75–5.25 V). | Use Scenario: Portable glucose meters or pulse oximeters requiring clinical-grade voltage accuracy and low EMI. IC Role / Device Role / Timing Role: Provides precision 1.8 V sensor bias and 3.3 V display/interface rail, with PG confirming LDO regulation before measurement cycle. Use Value: ±0.3% VOUT2 tolerance and 25 ppm/°C tempco ensure <±1.5 mV drift across −20°C to +50°C operating range - meeting ISO 13485 requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303A-ZA0EMF | PG monitors buck output (VOUT1) instead of LDO; PG is open-drain | Suitable when system reset depends on core rail stability rather than I/O rail | Select when primary reset trigger must align with processor core voltage ramp, not peripheral rail |
| TC1303C-ZA0EMF | PG monitors both VOUT1 and VOUT2 simultaneously; PG is open-drain | Required for systems needing guaranteed co-regulation of both rails before release | Choose when safety-critical applications demand that both core and I/O supplies meet regulation before enabling logic |
Compared with TC1303A-ZA0EMF and TC1303C-ZA0EMF, the TC1303B-ZA0EMF uniquely provides LDO-only PG monitoring with push-pull drive - offering simplified reset integration for designs where I/O rail readiness determines system boot readiness, without requiring external pull-up components or dual-rail coordination logic.
Availability
TC1303B-ZA0EMF is available at Aetrix Electronics and suitable for cellular phones, portable computers, and USB-powered devices requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for TC1303B-ZA0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability semiconductor products.
The TC1303 family is designed for space-constrained, battery-operated portable electronics requiring highly integrated dual-rail power management with minimal external components and robust protection features.
FAQ
What output voltages does the TC1303B-ZA0EMF provide?
The TC1303B-ZA0EMF provides fixed 1.8 V on its buck output (VOUT1) and fixed 3.3 V on its LDO output (VOUT2). These values are factory-trimmed and do not require external feedback resistors. The part number suffix "ZA0EMF" specifically denotes this 1.8 V / 3.3 V configuration in the 10-pin DFN package. Both outputs maintain ±0.3% tolerance over temperature and load.
How does the power-good (PG) function work on the TC1303B-ZA0EMF?
The TC1303B-ZA0EMF's PG pin is a push-pull output that asserts high only when the LDO output (VOUT2) reaches and sustains ≥94% of its nominal 3.3 V value, with a built-in 300 ms delay. This behavior is specific to the TC1303B variant. Unlike TC1303A (buck-monitored) or TC1303C (dual-monitored), the TC1303B-ZA0EMF uses PG exclusively for LDO regulation confirmation - ideal for systems where I/O rail readiness triggers boot.
Can the TC1303B-ZA0EMF operate from a single 3.7 V Li-ion battery?
Yes, the TC1303B-ZA0EMF supports input voltages from 2.7 V to 5.5 V, making it fully compatible with a single-cell Li-ion battery (nominal 3.7 V, discharge range ~3.0–4.2 V). At 3.6 V input, it delivers 1.8 V @ 500 mA and 3.3 V @ 300 mA with >90% efficiency on the buck stage and 137 mV dropout on the LDO - ensuring stable dual-rail operation across the full battery discharge curve.
What is the thermal performance of the TC1303B-ZA0EMF in its DFN package?
The TC1303B-ZA0EMF in the 3×3 mm DFN package has a typical junction-to-ambient thermal resistance (θJA) of 41 °C/W on a 4-layer PCB with internal ground plane and two vias under the exposed pad. When properly soldered with the EP connected to AGND, it sustains continuous 500 mA buck and 300 mA LDO output currents at ambient temperatures up to +85°C without thermal shutdown - verified per its −40°C to +125°C junction rating.
Does the TC1303B-ZA0EMF require external compensation components?
No, the TC1303B-ZA0EMF features internally compensated control loops for both the buck regulator and the LDO - eliminating the need for external compensation capacitors or resistors on either output. This reduces bill-of-materials cost and PCB area, and ensures stable operation with only the required input/output capacitors (4.7 µF on VIN, 1 µF on VOUT2) and 4.7 µH inductor on the buck stage.
TC1303B-ZA0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 3.3V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303B-ZA0EMF FAQ
1.How can I place an order for TC1303B-ZA0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303B-ZA0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303B-ZA0EMF reliable?
The price and inventory of TC1303B-ZA0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303B-ZA0EMF is usually 5 days.
3.What payment methods are accepted for TC1303B-ZA0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303B-ZA0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303B-ZA0EMF?
TC1303B-ZA0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303B-ZA0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303B-ZA0EMF?
For technical support, including TC1303B-ZA0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303B-ZA0EMF requirements.
6.How does Aetrix verify that TC1303B-ZA0EMF is sourced from the original manufacturer or authorized distributors?
All TC1303B-ZA0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303B-ZA0EMF meets industry standards.
7.What is the process for return or replacement of TC1303B-ZA0EMF?
All TC1303B-ZA0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303B-ZA0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303B-ZA0EMF part is unused and in its original packaging.
Return procedure for TC1303B-ZA0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TC1303B-ZA0EMF Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

