Microchip Technology TC1303B-ZH0EMF
- Part No.:
- TC1303B-ZH0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303B-ZH0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,976
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TC1303B-ZH0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with the power-good (PG) output monitoring only the LDO output (VOUT2). It delivers 1.8 V on VOUT1 and 3.3 V on VOUT2, operates from 2.7–5.5 V input, and features 65 µA typical quiescent current, 2.0 MHz fixed-frequency PWM switching, and 137 mV typical dropout at 200 mA for the LDO - ideal for portable medical instruments and USB-powered devices requiring tightly regulated dual supplies.
For engineers reviewing the TC1303B-ZH0EMF datasheet, TC1303B-ZH0EMF pinout, TC1303B-ZH0EMF application, or TC1303B-ZH0EMF equivalent, key selection considerations include its LDO-monitored PG function, independent shutdown control per output, internal compensation, thermal/UVLO/short-circuit protection, and compatibility with 3×3 mm DFN-10 packaging for space-constrained battery-powered designs.
Technical Context
The TC1303B-ZH0EMF implements a fixed-frequency synchronous buck stage with automatic transition to PFM mode under light load to maintain ultra-low IQ, while its LDO stage uses a single 1 µF ceramic output capacitor and achieves 94% regulation threshold detection on VOUT2 for the push-pull PG output. The device employs separate SHDN1 and SHDN2 inputs enabling independent enable/disable control of buck and LDO outputs.
Its functional block integrates undervoltage lockout (UVLO) triggering at 2.55 V nominal, overtemperature shutdown at 165 °C with 10 °C hysteresis, and internal MOSFET drivers with 450 mΩ typical RDS(on) for both high- and low-side switches - all operating across –40°C to +125°C junction temperature range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output 1 (Buck) | 1.8 V adjustable/fixed, 500 mA max; enables core voltage supply with >90% efficiency at heavy load |
| Output 2 (LDO) | 3.3 V fixed, 300 mA max; provides low-noise bias rail with 137 mV dropout at 200 mA |
| Power-Good Logic | Push-pull PG output monitoring only VOUT2; asserts high when VOUT2 ≥ 94% of 3.3 V |
| Quiescent Current | 65 µA typical total device IQ; critical for battery runtime in always-on subsystems |
| Switching Frequency | 2.0 MHz fixed (1.6–2.4 MHz range); allows use of small 4.7 µH inductor and compact layout |
| Operating Input Range | 2.7 V to 5.5 V; supports single-cell Li-ion (3.0–4.2 V) and USB 5 V bus directly |
| Protection Features | UVLO (2.55 V), thermal shutdown (165 °C), output short-circuit, and overcurrent on both rails |
Pinout & Package
TC1303B-ZH0EMF is housed in a thermally enhanced 10-pin 3×3 mm DFN package with exposed pad (EP) connected to AGND. Pin 1 is SHDN2; pin 10 is PG. The package supports θJA = 41 °C/W on a 4-layer board with internal ground plane and 2 vias under EP.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| SHDN2 (Pin 1) | LDO shutdown control | Active-high logic input (>45% VIN); enables independent LDO disable for dynamic power gating |
| VIN2 (Pin 2) | LDO input supply | Accepts same input as VIN1; requires low-ESR input capacitor near pin for ripple suppression |
| VOUT2 (Pin 3) | LDO regulated output | 3.3 V fixed output; requires ≥1 µF ceramic capacitor to AGND for stability and transient response |
| PG (Pin 4) | Power-good indicator | Push-pull output asserting high when VOUT2 is within 94–96% of 3.3 V; used for processor reset sequencing |
| AGND (Pin 5) | Analog ground reference | Must be tied to clean analog ground plane; separates noise-sensitive feedback paths from PGND |
| PGND (Pin 6) | Power ground return | High-current return path for buck switch node; routed separately from AGND to minimize noise coupling |
| LX (Pin 7) | Buck switch node | Connects to external inductor; carries high di/dt switching current; requires tight loop area with VIN1 and PGND |
| VIN1 (Pin 8) | Buck input supply | Primary input for buck stage; shared with VIN2 via short trace; must include ≥4.7 µF input capacitance |
| SHDN1 (Pin 9) | Buck shutdown control | Active-high logic input (>45% VIN); allows independent buck disable without affecting LDO operation |
| VFB1/VOUT1 (Pin 10) | Buck feedback/output | For fixed 1.8 V version: connect directly to VOUT1; for adjustable: connect divider midpoint to set output voltage |
Key Features
| Feature | Design Value |
|---|---|
| Independent dual shutdown | SHDN1 and SHDN2 allow granular power sequencing - e.g., keep LDO active while disabling buck during sleep |
| Internally compensated loops | Eliminates need for external compensation components; reduces BOM count and layout sensitivity |
| 300 ms PG delay | Provides stable reset timing for microcontrollers after LDO reaches regulation - avoids premature release |
| Low-noise LDO output | 1.8 µV/√Hz output noise (≤1 kHz) and 62 dB PSRR (≤100 Hz) support noise-sensitive analog circuitry |
| Thermal and UVLO protection | Auto-shutdown at 165 °C junction temp and 2.55 V input prevents damage during fault conditions |
Applications
| Portable Medical Sensors | USB-Powered Test Equipment |
|---|---|
Use Scenario: Battery-operated glucose meter with MCU, analog front-end, and LCD display requiring isolated 1.8 V core and 3.3 V I/O rails. IC Role / Device Role / Timing Role: Dual-output PMIC providing regulated VDD_CORE and VDD_IO while using PG to hold MCU in reset until both rails stabilize. Use Value: 65 µA quiescent current extends single AAA battery life beyond 12 months in standby; 3.3 V LDO powers precision ADC reference with <1.8 µV/√Hz noise. | Use Scenario: Handheld oscilloscope module powered from USB 5 V, needing clean 1.8 V FPGA core and 3.3 V interface voltage. IC Role / Device Role / Timing Role: Primary power converter generating two independent supplies; PG signal synchronizes FPGA configuration with stable 3.3 V rail. Use Value: 2.0 MHz switching enables use of tiny 4.7 µH inductor; 137 mV LDO dropout ensures full 3.3 V output even as USB voltage sags to 4.4 V. |
| Industrial Handheld Terminals | Wearable Health Monitors |
Use Scenario: Ruggedized barcode scanner with ARM Cortex-M4, BLE radio, and capacitive touchscreen, operating from 3.6 V Li-ion. IC Role / Device Role / Timing Role: Single-chip dual-rail solution delivering 1.8 V for CPU and 3.3 V for peripherals; SHDN2 enables dynamic LDO disable during BLE transmit bursts. Use Value: Independent shutdown reduces system-wide IQ by 46 µA when LDO is gated; -40°C to +125°C rating supports outdoor deployment. | Use Scenario: ECG patch with ultra-low-power MCU, analog sensor front-end, and Bluetooth LE transceiver, powered by coin cell. IC Role / Device Role / Timing Role: Power manager supplying 1.8 V digital domain and 3.3 V analog/RF domain; PG initiates sensor calibration only after LDO reaches regulation. Use Value: 300 mA LDO current supports simultaneous BLE transmit and analog acquisition; 1 µF output cap minimizes footprint in constrained wearable PCB. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP1826-3302E/DB | Single 3.3 V LDO only; no buck stage or PG output | Cannot replace TC1303B-ZH0EMF's dual-rail capability; suitable only if buck function is implemented externally | Select only when existing design already includes a discrete buck converter and only LDO+PG functionality is needed |
| TPS62231DRYR | Single 1.8 V buck converter only; no integrated LDO or PG monitoring of secondary rail | Lacks LDO output and VOUT2-monitored PG; requires external LDO and comparator for dual-rail supervision | Choose when primary requirement is high-efficiency 1.8 V conversion and secondary rail is generated elsewhere |
Compared with MCP1826-3302E/DB and TPS62231DRYR, TC1303B-ZH0EMF uniquely integrates buck + LDO + LDO-monitored PG in one 3×3 mm DFN, eliminating three discrete components and associated layout complexity while guaranteeing coordinated startup and fault response.
Availability
TC1303B-ZH0EMF is available at Aetrix Electronics and suitable for portable medical instruments, USB-powered test equipment, and industrial handheld terminals requiring stable component supply with guaranteed long-term availability and full traceability.
Supply support for TC1303B-ZH0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
The TC1303 family was designed specifically for space- and power-constrained portable electronics requiring dual regulated supplies with minimal external components and robust fault protection - targeting battery-powered instrumentation and handheld computing.
FAQ
What output voltages does the TC1303B-ZH0EMF provide?
The TC1303B-ZH0EMF provides a fixed 1.8 V output on VOUT1 (buck regulator) and a fixed 3.3 V output on VOUT2 (LDO regulator). These values are factory-set for the ZH0EMF variant and do not require external feedback resistors. The device datasheet confirms VOUT1 = 1.8 V and VOUT2 = 3.3 V under standard operating conditions with ±0.3% tolerance.
How does the power-good (PG) output behave on the TC1303B-ZH0EMF?
The TC1303B-ZH0EMF features a push-pull PG output that monitors only the LDO output (VOUT2). It asserts high when VOUT2 reaches ≥94% of its nominal 3.3 V value and remains high for ≥262 ms once asserted. This behavior is specific to the TC1303B variant - unlike TC1303A (which monitors VOUT1) or TC1303C (which monitors both outputs).
Can the TC1303B-ZH0EMF operate from a single-cell Li-ion battery?
Yes, the TC1303B-ZH0EMF supports an input voltage range of 2.7 V to 5.5 V, fully covering the discharge profile of a single-cell Li-ion battery (typically 3.0 V to 4.2 V). Its 2.55 V UVLO threshold and 137 mV LDO dropout ensure reliable 3.3 V output even at end-of-discharge, and its 65 µA quiescent current maximizes battery life in standby.
What is the recommended output capacitor for the LDO (VOUT2) on the TC1303B-ZH0EMF?
The TC1303B-ZH0EMF requires a minimum 1.0 µF ceramic capacitor between VOUT2 and AGND for stable operation and optimal transient response. The datasheet explicitly states "a single 1 µF ceramic output capacitor" suffices for the LDO stage, minimizing board area and cost while maintaining regulation under 300 mA load steps.
Does the TC1303B-ZH0EMF support independent enable control of its two regulators?
Yes, the TC1303B-ZH0EMF provides independent shutdown control via SHDN1 (for the buck regulator) and SHDN2 (for the LDO). Driving SHDN1 low disables only VOUT1 while keeping VOUT2 active, and driving SHDN2 low disables only VOUT2 while VOUT1 remains operational - enabling flexible power sequencing in multi-rail systems.
TC1303B-ZH0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 2.6V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303B-ZH0EMF FAQ
1.How can I place an order for TC1303B-ZH0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303B-ZH0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303B-ZH0EMF reliable?
The price and inventory of TC1303B-ZH0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303B-ZH0EMF is usually 5 days.
3.What payment methods are accepted for TC1303B-ZH0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303B-ZH0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303B-ZH0EMF?
TC1303B-ZH0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303B-ZH0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303B-ZH0EMF?
For technical support, including TC1303B-ZH0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303B-ZH0EMF requirements.
6.How does Aetrix verify that TC1303B-ZH0EMF is sourced from the original manufacturer or authorized distributors?
All TC1303B-ZH0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303B-ZH0EMF meets industry standards.
7.What is the process for return or replacement of TC1303B-ZH0EMF?
All TC1303B-ZH0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303B-ZH0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303B-ZH0EMF part is unused and in its original packaging.
Return procedure for TC1303B-ZH0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TC1303B-ZH0EMF Tags

-
TPS6521905RHBR
Texas Instruments

-
MIC3385YHL-TR
Microchip Technology

-
A4402ELPTR-T
Allegro MicroSystems
-
LM26480SQ-AA/NOPB
Texas Instruments

-
A4402KLPTR-T
Allegro MicroSystems

-
BD71847AMWV-E2
ROHM Semiconductor

-
ADP5040ACPZ-1-R7
Analog Devices Inc.

-
LT3048IDC#TRPBF
Analog Devices Inc.

-
ADP5037ACPZ-R7
Analog Devices Inc.

-
XRP7714ILB-F
MaxLinear, Inc.

-
LTC3260EDE#TRPBF
Analog Devices Inc.

-
LTC3260EMSE#PBF
Analog Devices Inc.
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

