Microchip Technology TC1303C-ZI0EMF
- Part No.:
- TC1303C-ZI0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303C-ZI0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303C-ZI0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of both outputs and 300 ms delay for processor reset. It operates from 2.7V to 5.5V input, delivers typical quiescent current of 65 µA, and supports adjustable (0.8–4.5 V) or fixed-output voltages for VOUT1 and standard fixed outputs (1.5/1.8/2.5/3.3 V) for VOUT2. It is used in portable medical instruments requiring tightly regulated dual-rail supplies with low standby power.
For engineers reviewing the TC1303C-ZI0EMF datasheet, TC1303C-ZI0EMF pinout, TC1303C-ZI0EMF application, or TC1303C-ZI0EMF equivalent, key selection criteria include independent shutdown control per rail, simultaneous PG monitoring of buck and LDO outputs, 2.0 MHz fixed-frequency PWM operation with automatic PFM transition at light load, 137 mV typical dropout at 200 mA on VOUT2, and compatibility with 1 µF ceramic output capacitors.
Technical Context
The TC1303C-ZI0EMF implements a synchronous buck topology with integrated high- and low-side MOSFETs (RDS(on) = 450 mΩ each), fixed 2.0 MHz switching frequency under heavy load, and seamless auto-transition to PFM mode below ~10 mA to maintain ultra-low IQ. Its LDO stage uses internal compensation and achieves ±0.3% output voltage tolerance over temperature and line/load variations.
Power-good logic monitors both VOUT1 and VOUT2 simultaneously-asserting open-drain PG when both outputs reach ≥94% of nominal regulation-with 165 µs propagation delay and 262 ms active timeout period. Undervoltage lockout (2.55 V typ, 200 mV hysteresis) and thermal shutdown (165°C, 10°C hysteresis) provide robust fault protection across -40°C to +125°C junction range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7 V to 5.5 V - supports single-cell Li-ion (2.7–4.2 V) and USB 5 V rails without external pre-regulation |
| Buck Output Current | 500 mA max - sufficient for core voltage supply of ARM Cortex-M microcontrollers or FPGA I/O banks |
| LDO Output Current | 300 mA max - powers analog sensors, RF front-ends, or communication interfaces requiring low-noise bias |
| Quiescent Current | 65 µA typical - enables >1-year battery life in always-on portable medical devices at light load |
| PG Monitoring Scope | Both VOUT1 and VOUT2 - ensures system reset only after full dual-rail stabilization, critical for mixed-signal SoCs |
| Dropout Voltage (VOUT2) | 137 mV @ 200 mA - allows operation down to 1.637 V input for 1.5 V LDO output, maximizing battery utilization |
| Switching Frequency | 2.0 MHz ±0.4 MHz - permits use of compact 4.7 µH inductors and reduces EMI filtering burden |
Pinout & Package
TC1303C-ZI0EMF is packaged in a 10-pin 3×3 mm DFN with exposed thermal pad (EP), pin-compatible with MSOP-10. The exposed pad must be soldered to AGND for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control | Active-low logic input; <15% VIN disables VOUT2, enabling independent rail sequencing |
| 2 (VIN2) | LDO input supply | Accepts same input as VIN1; requires short trace routing to minimize noise coupling into LDO path |
| 3 (VOUT2) | LDO regulated output | Delivers 300 mA with ≤1.8 µV/√Hz output noise; requires ≥1 µF ceramic capacitor to AGND |
| 4 (PG) | Power-good indicator | Open-drain output asserting low only when both VOUT1 and VOUT2 are within 94–96% of target |
| 5 (AGND) | Analog ground reference | Must be tied to clean analog ground plane; separate from PGND to avoid switching noise injection |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; connects to LX and VIN1 return, not AGND |
| 7 (LX) | Buck switch node | Connects to external inductor; carries high di/dt; requires tight loop layout with minimal parasitic inductance |
| 8 (VIN1) | Buck input supply | Primary input for synchronous buck; shares source with VIN2 but routed separately for optimal decoupling |
| 9 (SHDN1) | Buck shutdown control | Independent active-low enable for buck stage; allows selective power-down of processor core rail |
| 10 (VFB1/VOUT1) | Buck feedback or output | Configurable: connect to divider midpoint for adjustable VOUT1, or directly to output for fixed-voltage variants |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown per rail | Enables precise power sequencing-e.g., hold LDO active while cycling buck for firmware update |
| Simultaneous dual-rail PG monitoring | Eliminates need for external OR-gate logic to combine two PG signals, reducing BOM and board area |
| Internally compensated LDO | Requires only 1 µF ceramic output capacitor-no external compensation network needed |
| Auto PWM-to-PFM mode transition | Maintains >85% efficiency down to 100 µA load without manual mode control or additional circuitry |
| 2.0 MHz fixed-frequency operation | Permits use of sub-5 mm × 5 mm inductors and simplifies EMI filter design vs. lower-frequency alternatives |
Applications
| Portable Medical Sensors | USB-Powered Test Equipment |
|---|---|
Use Scenario: Battery-powered glucose meter with LCD display and Bluetooth LE radio. IC Role / Device Role / Timing Role: Dual-rail PMIC supplying 1.8 V to MCU core (buck) and 3.3 V to BLE transceiver + sensor interface (LDO). Use Value: 65 µA quiescent current extends CR2032 coin-cell life beyond 18 months; simultaneous PG ensures reliable boot before sensor initialization. | Use Scenario: Handheld oscilloscope module powered via USB 5 V bus. IC Role / Device Role / Timing Role: Generates 1.2 V for ADC/DAC digital core and 2.5 V for precision analog front-end from shared 5 V input. Use Value: 137 mV LDO dropout enables stable 2.5 V output even as USB voltage sags to 4.75 V; 2.0 MHz switching minimizes conducted EMI near sensitive analog inputs. |
| Industrial Handheld Terminals | Wearable Health Monitors |
Use Scenario: Ruggedized barcode scanner with cold-temperature operation requirement. IC Role / Device Role / Timing Role: Powers 3.3 V logic and 1.5 V FPGA configuration rail across -40°C to +85°C ambient. Use Value: Guaranteed operation to +125°C junction enables reliability in sealed enclosures; ±0.3% VOUT2 tolerance maintains timing margin for FPGA I/O standards. | Use Scenario: ECG patch with continuous 24/7 sensing and Bluetooth streaming. IC Role / Device Role / Timing Role: Supplies 1.8 V to ultra-low-power MCU and 3.3 V to analog signal chain and RF section. Use Value: Independent SHDN1/SHDN2 pins allow MCU to shut down RF during sleep while keeping analog sensor bias active, cutting system IQ by 40%. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS62748IRGET | Single-output buck with integrated LDO; no dual independent shutdown; 300 mA buck + 200 mA LDO; 3.6 µA IQ | Optimized for ultra-low-IQ wearables but lacks simultaneous dual-rail PG and independent rail control | Select when lowest possible standby current is primary requirement and dual PG monitoring is unnecessary |
| MAX8667ETA+T | Dual buck (600 mA/300 mA); no integrated LDO; PG monitors only main buck; 25 µA IQ | Higher efficiency for dual-digital-rail systems but cannot supply low-noise analog bias required by sensors | Select when both rails drive digital loads and analog noise sensitivity is not a concern |
Compared with TPS62748IRGET and MAX8667ETA+T, TC1303C-ZI0EMF uniquely combines independent rail shutdown, simultaneous dual-output power-good assertion, and an integrated low-noise LDO-making it the only choice for portable medical and industrial handhelds demanding coordinated rail sequencing and analog supply integrity.
Availability
TC1303C-ZI0EMF is available at Aetrix Electronics and suitable for portable medical instruments, USB-powered test equipment, and industrial handheld terminals requiring stable component supply with guaranteed long-term availability and full traceability.
Supply support for TC1303C-ZI0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
The TC1303 family is designed specifically for space-constrained portable electronics needing highly integrated, low-quiescent-current dual-rail power management with robust sequencing and monitoring-targeting battery-operated medical, instrumentation, and handheld computing applications.
FAQ
What is the maximum input voltage rating for TC1303C-ZI0EMF?
The absolute maximum input voltage for TC1303C-ZI0EMF is 6.0 V applied between VIN1 or VIN2 and AGND. Operation above 5.5 V violates the recommended operating conditions and may cause permanent damage. The device is specified for continuous operation from 2.7 V to 5.5 V, making it compatible with standard USB 5 V and single-cell Li-ion sources. Always observe the 200 mV UVLO hysteresis to ensure clean startup behavior.
Does TC1303C-ZI0EMF support adjustable output voltage on both regulators?
TC1303C-ZI0EMF supports adjustable output voltage only on the buck regulator (VOUT1) via external resistor divider connected to the VFB1 pin; the LDO output (VOUT2) is factory-trimmed to fixed values (1.5 V, 1.8 V, 2.5 V, or 3.3 V). The ZI0EMF suffix indicates a specific variant with fixed 3.3 V on VOUT2 and adjustable VOUT1. This architecture balances flexibility for processor core voltage with simplicity and low noise for analog bias rails.
How does the power-good (PG) function behave on TC1303C-ZI0EMF?
On TC1303C-ZI0EMF, the PG pin is an open-drain output that asserts low only when both VOUT1 and VOUT2 are within 94% to 96% of their respective nominal voltages-verified continuously with 2% hysteresis. It features a 165 µs propagation delay and a 262 ms active timeout window. This dual-rail monitoring eliminates false resets caused by transient dips on one rail alone, ensuring deterministic system boot in safety-critical portable medical devices using TC1303C-ZI0EMF.
Can TC1303C-ZI0EMF operate reliably at -40°C ambient temperature?
Yes, TC1303C-ZI0EMF is fully specified for operation across -40°C to +125°C junction temperature. Electrical characteristics-including output voltage tolerance (±0.3%), load regulation, and PG threshold accuracy-are guaranteed over this full range. The device's thermal shutdown activates at 165°C with 10°C hysteresis, and its DFN package achieves θJA = 41°C/W on a 4-layer board, enabling robust performance in sealed industrial handhelds or outdoor medical monitors where ambient extremes occur.
What is the minimum output capacitor required for the LDO output (VOUT2) of TC1303C-ZI0EMF?
The minimum recommended output capacitor for VOUT2 on TC1303C-ZI0EMF is 1.0 µF ceramic (X5R or X7R dielectric) placed as close as possible to the VOUT2 and AGND pins. This value ensures stability, adequate load-step response, and meets the 1.8 µV/√Hz output noise specification. Larger capacitance (e.g., 2.2 µF) further improves ripple rejection but is not required for basic functionality. No ESR requirements or series damping resistors are needed due to internal compensation.
TC1303C-ZI0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 2.5V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303C-ZI0EMF FAQ
1.How can I place an order for TC1303C-ZI0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303C-ZI0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303C-ZI0EMF reliable?
The price and inventory of TC1303C-ZI0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303C-ZI0EMF is usually 5 days.
3.What payment methods are accepted for TC1303C-ZI0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303C-ZI0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303C-ZI0EMF?
TC1303C-ZI0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303C-ZI0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303C-ZI0EMF?
For technical support, including TC1303C-ZI0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303C-ZI0EMF requirements.
6.How does Aetrix verify that TC1303C-ZI0EMF is sourced from the original manufacturer or authorized distributors?
All TC1303C-ZI0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303C-ZI0EMF meets industry standards.
7.What is the process for return or replacement of TC1303C-ZI0EMF?
All TC1303C-ZI0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1303C-ZI0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303C-ZI0EMF part is unused and in its original packaging.
Return procedure for TC1303C-ZI0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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