Microchip Technology TC1303C-ZI0EMFTR
- Part No.:
- TC1303C-ZI0EMFTR
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1303C-ZI0EMFTR.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1303C-ZI0EMFTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of both outputs, 65 µA typical quiescent current, and operation across –40°C to +125°C junction temperature. It delivers tightly regulated core and bias voltages for portable processors in USB-powered devices and handheld medical instruments.
For engineers reviewing the TC1303C-ZI0EMFTR datasheet, TC1303C-ZI0EMFTR pinout, TC1303C-ZI0EMFTR application, or TC1303C-ZI0EMFTR equivalent, key selection criteria include independent shutdown control, 2.0 MHz fixed-frequency PWM/PFM auto-transition, 137 mV LDO dropout at 200 mA, dual-output PG monitoring, and DFN/MSOP package compatibility with thermal pad grounding.
Technical Context
The TC1303C-ZI0EMFTR implements a synchronous buck stage with integrated P- and N-channel MOSFETs (450 mΩ RDS(on) each), fixed 2.0 MHz switching under heavy load, and automatic transition to PFM mode at light loads to maintain ultra-low IQ. Its LDO stage uses internal compensation and requires only a 1 µF ceramic output capacitor.
Power-good logic monitors both VOUT1 and VOUT2 simultaneously with 94% threshold high, 89% threshold low, and 300 ms delay-enabling reliable processor reset sequencing. Undervoltage lockout (2.55 V nominal) and thermal shutdown (165°C) provide robust system-level protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 500 mA max - supports core voltage rails for ARM Cortex-M or similar microcontrollers |
| LDO Output Current | 300 mA max - powers I/O peripherals, sensors, or RF sections without external pass elements |
| Quiescent Current | 65 µA typical - enables >10-year battery life in always-on sensor nodes with dual-rail supply |
| LDO Dropout Voltage | 137 mV @ 200 mA - allows operation down to VIN = VOUT2 + 0.137 V, maximizing battery utilization |
| PG Monitoring Scope | Both VOUT1 and VOUT2 - ensures safe boot only when both rails are stable, critical for mixed-signal SoCs |
| Switching Frequency | 2.0 MHz ±0.4 MHz - permits use of compact 4.7 µH inductors and reduces EMI filtering burden |
| Operating Temp Range | –40°C to +125°C - qualified for automotive cabin and industrial edge computing environments |
Pinout & Package
TC1303C-ZI0EMFTR is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), requiring connection to AGND for thermal and electrical integrity. Pin numbering follows standard DFN orientation (pin 1 top-left, counterclockwise).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control input | Active-high logic (>45% VIN); enables independent LDO disable for dynamic power gating |
| 2 (VIN2) | LDO input supply | Accepts 2.7–5.5 V; must be routed short and low-inductance to VIN1 to minimize noise coupling |
| 3 (VOUT2) | LDO regulated output | Delivers fixed or adjustable voltage (1.5/1.8/2.5/3.3 V); requires ≥1 µF ceramic capacitor to AGND |
| 4 (PG) | Power-good open-drain output | Asserts low when both VOUT1 and VOUT2 are within ±6% regulation; pulls up externally for reset assertion |
| 5 (AGND) | Analog ground reference | Must connect to clean analog ground plane; separates noise-sensitive feedback paths from PGND |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; requires dedicated low-impedance trace to EP |
| 7 (LX) | Buck switch node | Connects to inductor; carries high di/dt; layout critical to minimize EMI and voltage spikes |
| 8 (VIN1) | Buck input supply | Shares input source with VIN2; minimum 2.7 V required, subject to dropout constraints |
| 9 (SHDN1) | Buck shutdown control input | Active-high logic (>45% VIN); allows independent buck disable while LDO remains active |
| 10 (VFB1/VOUT1) | Buck feedback or output | Configurable: connect to divider midpoint for adjustable output (0.8–4.5 V), or directly to VOUT1 for fixed options |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown control | SHDN1 and SHDN2 allow granular power sequencing-e.g., keep LDO active for RTC while shutting down buck during sleep |
| Auto PWM-to-PFM transition | Eliminates need for external mode-select circuitry; maintains >85% efficiency down to 1 mA load without audible switching noise |
| Dual-output power-good monitoring | Single PG pin asserts only when both rails meet regulation-prevents false resets in multi-rail systems like FPGA+DDR designs |
| Internally compensated LDO | Enables stable operation with only 1 µF ceramic output capacitor-reduces BOM count and board area vs. discrete LDO solutions |
| Thermal and overcurrent protection | Integrated shutdown at 165°C with 10°C hysteresis and cycle-by-cycle current limiting on both outputs prevent field failures |
Applications
| Portable Medical Sensors | USB-C Powered Peripherals |
|---|---|
Use Scenario: Continuous glucose monitor with BLE radio and analog front-end. IC Role / Device Role / Timing Role: Dual-rail power manager supplying 1.8 V to MCU core and 3.3 V to BLE transceiver and ADC. Use Value: 65 µA IQ extends single-CR2032 battery life beyond 2 years; PG monitoring prevents firmware crash during brown-out. | Use Scenario: USB-C dock delivering 5 V, 3.3 V, and 1.2 V to connected laptops, displays, and accessories. IC Role / Device Role / Timing Role: Primary local regulator generating 3.3 V auxiliary rail and 1.2 V core rail from 5 V USB-C PD bus. Use Value: 2.0 MHz switching enables small 4.7 µH inductor; independent SHDN pins allow dynamic rail enablement per device attachment. |
| Industrial Handheld Terminals | Low-Power IoT Edge Nodes |
Use Scenario: Rugged barcode scanner operating in warehouses from Li-ion battery or 12 V vehicle supply. IC Role / Device Role / Timing Role: Dual-output PMIC powering 3.3 V imaging sensor and 1.8 V application processor with cold-temperature startup. Use Value: –40°C to +125°C rating ensures reliability in uncontrolled environments; 137 mV LDO dropout maximizes runtime at end-of-discharge. | Use Scenario: Battery-operated environmental sensor node transmitting data via LoRaWAN every 15 minutes. IC Role / Device Role / Timing Role: Ultra-low-power regulator supplying 3.3 V to LoRa transceiver and 1.8 V to ultra-low-leakage MCU during wake-up bursts. Use Value: PFM mode reduces IQ to <100 µA during 99% sleep time; PG signal synchronizes MCU wake-up with rail stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output regulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MCP1826S-3302E/DB | Single 3.3 V LDO (500 mA), no buck stage or PG function | Only supplies one rail; lacks power sequencing and monitoring capability | Select when only a single low-noise bias rail is needed and system already provides core voltage |
| TPS65023RSBR | Triple-output PMIC (2 buck + 1 LDO), 2.25 MHz, but higher IQ (120 µA) and no dual-PG monitoring | Supports more rails but cannot assert PG only after both buck and LDO stabilize | Choose for systems needing three regulated outputs where PG timing flexibility is secondary to rail count |
Compared with MCP1826S-3302E/DB and TPS65023RSBR, TC1303C-ZI0EMFTR uniquely combines dual-rail generation, independent shutdown, and coordinated PG assertion-making it optimal for space-constrained, battery-sensitive applications requiring guaranteed dual-rail readiness before system boot.
Availability
TC1303C-ZI0EMFTR is available at Aetrix Electronics and suitable for portable medical sensors, USB-C powered peripherals, and industrial handheld terminals requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for TC1303C-ZI0EMFTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
TC1303C-ZI0EMFTR belongs to Microchip's TC1303 family of dual-output regulators designed specifically for battery-powered portable electronics requiring minimal quiescent current, compact footprint, and robust power sequencing-without external compensation or complex layout.
FAQ
What output voltage options does TC1303C-ZI0EMFTR support for its buck and LDO stages?
TC1303C-ZI0EMFTR supports adjustable buck output from 0.8 V to 4.5 V via external resistor divider on VFB1, or fixed options including 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V. The LDO offers fixed outputs of 1.5 V, 1.8 V, 2.5 V, and 3.3 V. The specific configuration for TC1303C-ZI0EMFTR is determined by internal laser trimming at manufacture and documented in its ordering code; full details are in Microchip DS21949C.
How does the power-good (PG) function behave on TC1303C-ZI0EMFTR compared to TC1303A or TC1303B variants?
Unlike TC1303A (PG monitors only VOUT1) or TC1303B (PG monitors only VOUT2), TC1303C-ZI0EMFTR's PG pin asserts only when both VOUT1 and VOUT2 are within regulation-specifically above 94% of nominal voltage. This dual-monitoring behavior is hard-coded into the TC1303C variant and enables safer boot sequencing in systems dependent on two stable rails.
Can TC1303C-ZI0EMFTR operate with separate input sources for VIN1 and VIN2?
No-datasheet Section 1 states "VIN1 and VIN2 are supplied by the same input source" (Note 8). Routing separate supplies risks violating internal UVLO thresholds and may cause unstable regulation or premature shutdown. TC1303C-ZI0EMFTR requires VIN1 and VIN2 to be tied together with low-inductance traces, as shown in all typical application circuits.
What is the thermal performance difference between the DFN and MSOP packages for TC1303C-ZI0EMFTR?
TC1303C-ZI0EMFTR in the 10-lead DFN package has θJA = 41°C/W (typical, 4-layer board with thermal vias), while the MSOP version has θJA = 113°C/W. This 2.7× lower thermal resistance makes the DFN essential for high-ambient or high-load applications-e.g., at 500 mA buck load and 300 mA LDO load, DFN keeps junction temperature within spec where MSOP would exceed 125°C.
Does TC1303C-ZI0EMFTR require external compensation components for stability?
No-both the buck regulator and LDO stages in TC1303C-ZI0EMFTR are internally compensated. The buck stage only requires an external 4.7 µH inductor and input/output capacitors; the LDO requires only a 1 µF ceramic output capacitor on VOUT2. No RC networks, feedforward capacitors, or compensation pins are needed, simplifying design and reducing BOM cost.
TC1303C-ZI0EMFTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 2.5V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1303C-ZI0EMFTR FAQ
1.How can I place an order for TC1303C-ZI0EMFTR through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303C-ZI0EMFTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303C-ZI0EMFTR reliable?
The price and inventory of TC1303C-ZI0EMFTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303C-ZI0EMFTR is usually 5 days.
3.What payment methods are accepted for TC1303C-ZI0EMFTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303C-ZI0EMFTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303C-ZI0EMFTR?
TC1303C-ZI0EMFTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303C-ZI0EMFTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303C-ZI0EMFTR?
For technical support, including TC1303C-ZI0EMFTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303C-ZI0EMFTR requirements.
6.How does Aetrix verify that TC1303C-ZI0EMFTR is sourced from the original manufacturer or authorized distributors?
All TC1303C-ZI0EMFTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303C-ZI0EMFTR meets industry standards.
7.What is the process for return or replacement of TC1303C-ZI0EMFTR?
All TC1303C-ZI0EMFTR units undergo pre-shipment inspection (PSI). If there is an issue with TC1303C-ZI0EMFTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303C-ZI0EMFTR part is unused and in its original packaging.
Return procedure for TC1303C-ZI0EMFTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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