Microchip Technology TC1303C-ZP0EUN
- Part No.:
- TC1303C-ZP0EUN
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TC1303C-ZP0EUN.pdf
- Description:
- IC REG DL BUCK/LNR SYNC 10MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:1,953
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Product details
Overview
TC1303C-ZP0EUN from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of both outputs. It delivers 1.8 V @ 500 mA (buck) and 3.3 V @ 300 mA (LDO) from a 2.7–5.5 V input, features 65 µA typical quiescent current, 2.0 MHz fixed-frequency PWM operation, and operates across –40°C to +125°C for portable medical instruments and USB-powered devices.
For engineers reviewing the TC1303C-ZP0EUN datasheet, TC1303C-ZP0EUN pinout, TC1303C-ZP0EUN application, or TC1303C-ZP0EUN equivalent, key selection criteria include independent shutdown control per output, 300 ms programmable power-good delay for processor reset, 137 mV LDO dropout at 200 mA, internal compensation eliminating external loop components, and compatibility with 1 µF ceramic output capacitors on both rails.
Technical Context
The TC1303C-ZP0EUN implements a synchronous buck stage with PFM/PWM auto-transition and an independently controllable LDO stage-both internally compensated. Its power-good circuit monitors regulation status of *both* VOUT1 and VOUT2 simultaneously, asserting open-drain PG after a 300 ms delay once both outputs reach ≥94% of nominal voltage.
It supports adjustable (0.8–4.5 V) or fixed-output configurations for the buck regulator and offers standard LDO voltages (1.5/1.8/2.5/3.3 V). Shutdown logic accepts 15% VIN low and 45% VIN high thresholds, enabling robust interface with microcontroller GPIOs without level-shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 500 mA maximum - supports core voltage rail for low-power processors and FPGAs |
| LDO Output Current | 300 mA maximum - powers I/O peripherals, sensors, or RF sections requiring low-noise bias |
| Quiescent Current | 65 µA typical - enables multi-day battery life in always-on portable systems |
| Switching Frequency | 2.0 MHz fixed (±0.4 MHz) - allows use of compact 4.7 µH inductors and reduces EMI filtering burden |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - maintains regulation down to VIN = VOUT + 0.137 V, easing input supply design |
| Power-Good Delay | 300 ms nominal - provides clean, debounced reset signal for system initialization sequencing |
| Operating Temp Range | –40°C to +125°C junction - qualified for industrial and automotive under-hood auxiliary power applications |
Pinout & Package
TC1303C-ZP0EUN is housed in a 10-lead 3×3 mm DFN package with exposed thermal pad (EP), optimized for high thermal efficiency in space-constrained designs. Pin 11 (EP) must be soldered to AGND for proper thermal dissipation and electrical reference.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN2) | LDO shutdown control | Active-high logic input; enables/disables LDO output independently of buck stage |
| 2 (VIN2) | LDO input supply | Accepts 2.7–5.5 V; must be tied closely to VIN1 to minimize noise coupling into LDO path |
| 3 (VOUT2) | LDO regulated output | Delivers fixed 3.3 V (per ZP0EUN suffix); requires ≥1 µF ceramic capacitor to AGND |
| 4 (PG) | Power-good indicator | Open-drain output asserting low when *both* VOUT1 and VOUT2 are within 94–96% of target |
| 5 (AGND) | Analog ground reference | Separate ground return for feedback and regulation circuitry; must connect to quiet analog ground plane |
| 6 (PGND) | Power ground return | High-current return path for buck switch node; connects to power ground plane near LX and VIN1 |
| 7 (LX) | Buck switch node | Connects to external inductor; carries high di/dt switching current - requires short, wide trace |
| 8 (VIN1) | Buck input supply | Accepts 2.7–5.5 V; shared input with VIN2 but routed separately for optimal decoupling |
| 9 (SHDN1) | Buck shutdown control | Active-high logic input; enables/disables buck regulator independently of LDO stage |
| 10 (VFB1/VOUT1) | Buck feedback/sense | Configured as VOUT1 for fixed-output variants (e.g., ZP0EUN = 1.8 V buck); no external divider needed |
Key Features
| Feature | Design Value |
|---|---|
| Independent shutdown per output | Enables flexible power sequencing: LDO can remain active while buck is disabled (or vice versa) for dynamic power management |
| Both outputs internally compensated | Eliminates need for external compensation networks - reduces BOM count and layout complexity |
| Automatic PWM-to-PFM mode transition | Maintains >85% efficiency at light loads (<10 mA) without requiring external mode-control signals |
| 300 mA LDO with 1 µF output cap | Minimizes board area and cost - avoids large tantalum or electrolytic capacitors typically required for stability |
| Monitors both buck and LDO for PG | Ensures system reset only occurs after *all* critical rails are stable - prevents partial-power-up failures |
Applications
| Portable Medical Sensors | USB-Powered Test Equipment |
|---|---|
Use Scenario: Battery-operated glucose meter with LCD display and Bluetooth LE radio. IC Role / Device Role / Timing Role: Dual-rail power source: 1.8 V buck powers MCU core; 3.3 V LDO supplies radio transceiver and display driver. Use Value: 65 µA quiescent current extends single-CR2032 battery life beyond 12 months in standby; 300 ms PG ensures reliable MCU boot after cold start. | Use Scenario: Handheld oscilloscope module powered solely via USB 2.0 (5 V @ 500 mA). IC Role / Device Role / Timing Role: Primary power converter generating 3.3 V for digital logic and 1.8 V for ADC reference and FPGA I/O banks. Use Value: 2.0 MHz switching frequency enables use of tiny 2.2 µH inductors; internal compensation eliminates tuning effort during prototyping. |
| Industrial Handheld Terminals | Low-Power IoT Edge Nodes |
Use Scenario: Rugged barcode scanner operating in warehouses from –20°C to +70°C ambient. IC Role / Device Role / Timing Role: Dual-output PMIC supplying 3.3 V to imager sensor and 1.8 V to ARM Cortex-M4 application processor. Use Value: –40°C to +125°C rating guarantees startup and regulation across full industrial temperature range; PG monitors both rails to prevent corrupted image capture on power-up. | Use Scenario: LoRaWAN sensor node powered by two AA alkaline cells (2.4–3.2 V). IC Role / Device Role / Timing Role: Efficient step-down + LDO solution delivering 3.3 V to radio and 1.8 V to ultra-low-power microcontroller. Use Value: 137 mV LDO dropout allows sustained 3.3 V output until battery reaches ~3.43 V; PFM mode draws <10 µA at sleep current. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS65023RSBR | Triple-output (2 buck + 1 LDO), higher IQ (100 µA), 2.25 MHz switching, QFN-24 package | Supports more complex SoC power trees; larger footprint and higher BOM cost | Choose when needing third rail or tighter load transient response; not drop-in due to pin count and routing changes |
| RT8059ZSP | Dual buck-only (no integrated LDO), 1.5 MHz, 300 mA per channel, WDFN-10 package | Lacks LDO output - requires external low-noise LDO for sensitive analog/RF rails | Prefer when noise-sensitive analog circuits demand dedicated LDO with PSRR >60 dB; adds component count and layout area |
Compared with TPS65023RSBR and RT8059ZSP, TC1303C-ZP0EUN uniquely balances integration (buck + LDO + dual-rail PG), ultra-low IQ, and compact 3×3 mm DFN packaging - making it optimal for cost- and size-constrained dual-rail battery-powered systems where LDO noise rejection is critical.
Availability
TC1303C-ZP0EUN is available at Aetrix Electronics and suitable for portable medical instrumentation, USB-powered test equipment, and industrial handheld terminals requiring stable component supply, long-term lifecycle support, and guaranteed lot traceability.
Supply support for TC1303C-ZP0EUN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog, and Flash-IP solutions, serving industrial, automotive, consumer, and communications markets with high-reliability semiconductor products.
The TC1303 family was designed specifically for space- and power-constrained portable electronics requiring tightly regulated dual-voltage rails with minimal external components and robust power sequencing capability.
FAQ
What output voltages does the TC1303C-ZP0EUN provide?
The TC1303C-ZP0EUN provides a fixed 1.8 V output from its synchronous buck regulator (VOUT1) and a fixed 3.3 V output from its low-dropout linear regulator (VOUT2), as indicated by the "ZP0EUN" part number suffix per Microchip's ordering guide. Both outputs are factory-trimmed to ±0.3% tolerance over temperature and load.
Does the TC1303C-ZP0EUN require external compensation components?
No, the TC1303C-ZP0EUN does not require external compensation components. Both the buck regulator and LDO are internally compensated, allowing stable operation with only input/output capacitors and an inductor - significantly simplifying design and reducing bill-of-materials cost.
How is the power-good (PG) signal configured on the TC1303C-ZP0EUN?
The TC1303C-ZP0EUN's PG pin is an open-drain output that asserts low only after *both* VOUT1 and VOUT2 reach and maintain ≥94% of their nominal values for 300 ms. This dual-rail monitoring ensures system reset occurs only when all critical supplies are fully stabilized.
What is the minimum input voltage required for the TC1303C-ZP0EUN to regulate both outputs?
The TC1303C-ZP0EUN requires VIN ≥ 2.7 V minimum, but practical minimum depends on output requirements: for 1.8 V buck output, VIN must exceed 1.8 V + dropout (280 mV @ 500 mA) → ≥2.08 V; however, the device enforces 2.7 V absolute minimum per UVLO threshold, so 2.7 V is the true operational floor.
Can the TC1303C-ZP0EUN operate with ceramic output capacitors only?
Yes, the TC1303C-ZP0EUN is fully compatible with ceramic output capacitors: 4.7 µF minimum on VOUT1 (buck) and 1 µF minimum on VOUT2 (LDO), both rated for X5R/X7R dielectric and ≥6.3 V working voltage. No electrolytic or tantalum capacitors are required.
TC1303C-ZP0EUN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 1.8V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
TC1303C-ZP0EUN FAQ
1.How can I place an order for TC1303C-ZP0EUN through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1303C-ZP0EUN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1303C-ZP0EUN reliable?
The price and inventory of TC1303C-ZP0EUN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1303C-ZP0EUN is usually 5 days.
3.What payment methods are accepted for TC1303C-ZP0EUN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1303C-ZP0EUN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1303C-ZP0EUN?
TC1303C-ZP0EUN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1303C-ZP0EUN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1303C-ZP0EUN?
For technical support, including TC1303C-ZP0EUN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1303C-ZP0EUN requirements.
6.How does Aetrix verify that TC1303C-ZP0EUN is sourced from the original manufacturer or authorized distributors?
All TC1303C-ZP0EUN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1303C-ZP0EUN meets industry standards.
7.What is the process for return or replacement of TC1303C-ZP0EUN?
All TC1303C-ZP0EUN units undergo pre-shipment inspection (PSI). If there is an issue with TC1303C-ZP0EUN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1303C-ZP0EUN part is unused and in its original packaging.
Return procedure for TC1303C-ZP0EUN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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