Microchip Technology TC1304-ZS0EMF
- Part No.:
- TC1304-ZS0EMF
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-VFDFN Exposed Pad
- Datasheet:
-
TC1304-ZS0EMF.pdf
- Description:
- IC REG DL BUCK/LINEAR SYNC 10DFN
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1304-ZS0EMF from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with power-good monitoring of both outputs and sequenced startup/shutdown. It operates from 2.7V to 5.5V input, delivers typical quiescent current of 70.1 µA, and supports fixed or adjustable VOUT1 (0.8–4.5V) and standard LDO voltages (1.5V/1.8V/2.5V/3.3V). It targets portable battery-powered systems requiring tightly coordinated dual-rail supplies.
For engineers reviewing the TC1304-ZS0EMF datasheet, TC1304-ZS0EMF pinout, TC1304-ZS0EMF application, or TC1304-ZS0EMF equivalent, key selection criteria include its dual-output sequencing capability, 300 ms power-good delay for processor reset, 2.0 MHz fixed-frequency PWM operation, open-drain PG output, and support for 10-pin DFN or MSOP packages with thermal pad.
Technical Context
The TC1304-ZS0EMF implements independent control logic for buck and LDO sections, with automatic PWM-to-PFM mode transition under light load to minimize quiescent current. Its power-good generator monitors both VOUT1 and VOUT2 simultaneously and asserts after a fixed 300 ms delay upon regulation.
Sequencing is hardware-defined: during startup, VOUT2 enables first, followed by VOUT1; during shutdown, VOUT1 disables before VOUT2. The device uses internal compensation for both regulators and integrates P- and N-channel MOSFETs with RDS(on) ≈ 450 mΩ each.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Input Voltage Range | 2.7V to 5.5V - supports single-cell Li-ion (2.7–4.2V) and USB 5V supply without external pre-regulation |
| Buck Output Current | 500 mA - sufficient for core voltage of low-power microcontrollers or DSPs |
| LDO Output Current | 300 mA - powers I/O rails, sensors, or RF front-ends with low noise |
| Quiescent Current | 70.1 µA typical - enables >1-year battery life in always-on portable devices |
| Power-Good Delay | 300 ms - provides stable reset timing for ARM Cortex-M or similar processors |
| Switching Frequency | 2.0 MHz ±0.4 MHz - allows use of small 4.7 µH inductors and compact 3×3 mm layout |
| LDO Dropout Voltage | 137 mV @ 200 mA - maintains regulation down to VIN = VOUT + 0.137V, critical for low-VIN operation |
Pinout & Package
TC1304-ZS0EMF is available in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), pin-compatible with the MSOP variant. The DFN variant requires EP soldered to AGND for thermal and electrical performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - SHDN | Active-low shutdown input | Controls sequencing: logic low disables both outputs; rising edge initiates controlled startup (VOUT2 first, then VOUT1) |
| 2 - VIN2 | LDO input supply | Accepts same input as VIN1; must be routed with minimal trace length to reduce noise coupling into LDO |
| 3 - VOUT2 | LDO regulated output | Delivers 300 mA at fixed 1.5V/1.8V/2.5V/3.3V; requires ≥1 µF ceramic capacitor to AGND |
| 4 - PG | Open-drain power-good output | Asserts low when both VOUT1 and VOUT2 are within ±6% of regulation; 300 ms delay ensures processor reset stability |
| 5 - AGND | Analog ground reference | Must be connected to clean analog ground plane; separate from PGND to avoid switching noise injection |
| 6 - PGND | Power ground return | Return path for buck switch current; requires low-inductance connection to input capacitor and inductor |
| 7 - LX | Buck switch node | Connects to external inductor; high dv/dt node requiring tight layout and guard ring |
| 8 - VIN1 | Buck input supply | Primary input for buck stage; tie directly to VIN2 with short, wide traces |
| 9 - VFB1/VOUT1 | Buck feedback or output | Configured as VOUT1 for fixed-output variants; for adjustable versions, connects to resistor divider midpoint |
| 10 - EP | Exposed thermal pad | Internally connected to AGND; must be soldered to PCB thermal plane for θJA = 41°C/W performance |
Key Features
| Feature | Design Value |
|---|---|
| Sequenced startup/shutdown | Hardware-enforced ordering eliminates need for external GPIO control or firmware coordination between rails |
| Both outputs internally compensated | Reduces BOM count by eliminating external compensation networks; simplifies design validation |
| 2.0 MHz fixed-frequency PWM | Enables use of miniature 4.7 µH inductors and fits switching harmonics above sensitive 2.4 GHz ISM band |
| Automatic PWM-to-PFM transition | Maintains >85% efficiency at loads <10 mA without requiring mode-select pins or configuration registers |
| Open-drain PG with 300 ms delay | Directly drives standard processor RESET# inputs; eliminates need for external RC timing network |
Applications
| USB-Powered Portable Instrument | Low-Power Medical Sensor Hub |
|---|---|
Use Scenario: Handheld blood glucose meter powered via USB-C port with dual-rail requirements (1.8V MCU core, 3.3V sensor interface). IC Role / Device Role / Timing Role: TC1304-ZS0EMF generates and sequences both rails; PG signal resets MCU only after both outputs stabilize. Use Value: Eliminates discrete LDO + buck controller + sequencing logic, reducing board area by >40% and enabling sub-50 mm² solution size. | Use Scenario: Wearable ECG patch using single Li-ion cell (2.7–4.2V) powering ultra-low-power ADC (2.5V) and BLE SoC (1.2V core + 3.3V radio). IC Role / Device Role / Timing Role: Delivers precise 2.5V LDO rail and adjustable 1.2V buck rail; sequenced shutdown prevents brownout during sleep entry. Use Value: 70.1 µA quiescent current extends battery life beyond 14 days in continuous monitoring mode. |
| Industrial Handheld Terminal | Embedded IoT Edge Node |
Use Scenario: Ruggedized barcode scanner operating from 3.6V nominal battery, requiring 3.3V logic rail and 1.5V display driver supply. IC Role / Device Role / Timing Role: Provides robust dual output with UVLO (2.55V threshold) and overtemperature protection (165°C shutdown). Use Value: Integrated short-circuit and thermal protection avoids need for external fault-handling circuitry in harsh environments. | Use Scenario: Battery-operated environmental sensor node (temperature/humidity/pressure) transmitting via LoRaWAN, needing 3.3V MCU and 2.5V analog front-end. IC Role / Device Role / Timing Role: Powers both subsystems from same input; PG signal synchronizes wake-up sequence with sensor initialization. Use Value: Dual-rail sequencing ensures analog front-end is fully biased before MCU reads conversion data, eliminating measurement offset. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303C-ZS0EMF | Same dual-output architecture and pinout, but lacks sequencing logic; SHDN1/SHDN2 enable independent control of buck and LDO | Suitable where independent enable/disable is required (e.g., dynamic power gating), not strict sequencing | Select TC1303C-ZS0EMF only if sequencing is unnecessary and independent shutdown is preferred |
| TPS65023RSBR | Triple-output (2 buck + 1 LDO), higher IOUT (600/600/260 mA), 2.25 MHz switching, but larger 4×4 mm QFN and no built-in PG delay | Used in more complex systems requiring three rails (e.g., OMAP-based designs); requires external timing for reset | Choose TPS65023RSBR when third rail or higher current is needed; accept added layout complexity and external PG timing |
Compared with TC1303C-ZS0EMF and TPS65023RSBR, TC1304-ZS0EMF uniquely combines hardware-enforced sequencing, integrated 300 ms PG delay, and minimal 3×3 mm footprint-making it optimal for space-constrained, battery-powered dual-rail applications where startup reliability is critical.
Availability
TC1304-ZS0EMF is available at Aetrix Electronics and suitable for USB-powered devices, handheld medical instruments, and industrial portable terminals requiring stable component supply across extended temperature ranges (-40°C to +125°C).
Supply support for TC1304-ZS0EMF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with high-reliability silicon and development tools.
The TC1303/TC1304 product line was designed specifically for portable and battery-powered applications requiring highly integrated, low-quiescent-current dual-rail power management with sequencing and power-good functionality.
FAQ
What is the function of the SHDN pin on the TC1304-ZS0EMF?
The SHDN pin on the TC1304-ZS0EMF is an active-low input that initiates hardware-controlled sequencing: a logic-low state disables both outputs in order (VOUT1 first, then VOUT2), while a rising edge enables them in sequence (VOUT2 first, then VOUT1). This eliminates software or external timing dependencies. TC1304-ZS0EMF does not require pull-up resistors on SHDN for basic operation, as internal biasing ensures defined state during power-up.
Does the TC1304-ZS0EMF support adjustable output voltage on both regulators?
No - only the buck regulator (VOUT1) supports adjustable output via external resistor divider on the VFB1 pin; the LDO output (VOUT2) is factory-trimmed to fixed voltages (1.5V, 1.8V, 2.5V, or 3.3V), as indicated by the "ZS0" suffix in TC1304-ZS0EMF. The "0" denotes 3.3V LDO output. TC1304-ZS0EMF cannot deliver arbitrary LDO voltages without external post-regulation.
How is power-good (PG) functionality implemented in the TC1304-ZS0EMF?
The TC1304-ZS0EMF's PG pin is an open-drain output that asserts low when both VOUT1 and VOUT2 are within 94–96% of their nominal values, with a fixed 300 ms delay from regulation detection. It monitors both rails simultaneously - unlike TC1303A/B variants - and requires an external pull-up resistor. TC1304-ZS0EMF's PG behavior is identical across temperature and load, with ±30 ppm/°C threshold tempco.
What thermal considerations apply to the TC1304-ZS0EMF in DFN package?
The TC1304-ZS0EMF in 10-pin DFN has θJA = 41°C/W on a 4-layer board with internal ground plane and two vias under the exposed pad (EP). To maintain TJ ≤ 125°C at full load, ambient must stay below ~85°C with proper EP soldering to AGND. Thermal shutdown activates at 165°C with 10°C hysteresis. TC1304-ZS0EMF performance degrades if EP is left floating or insufficiently soldered.
Can the TC1304-ZS0EMF operate with separate input sources for VIN1 and VIN2?
No - the TC1304-ZS0EMF datasheet explicitly states "VIN1 and VIN2 are supplied by the same input source" (Note 8, DS21949C-page 7). Using separate supplies risks violating absolute maximum ratings on PGND–AGND differential (±0.3V) and may cause instability or latch-up. TC1304-ZS0EMF requires VIN1 and VIN2 to be tied together with low-inductance routing; splitting them invalidates all published electrical characteristics.
TC1304-ZS0EMF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-VFDFN Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 1.5V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-DFN (3x3)
TC1304-ZS0EMF FAQ
1.How can I place an order for TC1304-ZS0EMF through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1304-ZS0EMF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1304-ZS0EMF reliable?
The price and inventory of TC1304-ZS0EMF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1304-ZS0EMF is usually 5 days.
3.What payment methods are accepted for TC1304-ZS0EMF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1304-ZS0EMF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1304-ZS0EMF?
TC1304-ZS0EMF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1304-ZS0EMF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1304-ZS0EMF?
For technical support, including TC1304-ZS0EMF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1304-ZS0EMF requirements.
6.How does Aetrix verify that TC1304-ZS0EMF is sourced from the original manufacturer or authorized distributors?
All TC1304-ZS0EMF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1304-ZS0EMF meets industry standards.
7.What is the process for return or replacement of TC1304-ZS0EMF?
All TC1304-ZS0EMF units undergo pre-shipment inspection (PSI). If there is an issue with TC1304-ZS0EMF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1304-ZS0EMF part is unused and in its original packaging.
Return procedure for TC1304-ZS0EMF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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