Microchip Technology TC1304-ZS0EUN
- Part No.:
- TC1304-ZS0EUN
- Manufacturer:
- Microchip Technology
- Category:
- Voltage Regulators - Linear + Switching
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
TC1304-ZS0EUN.pdf
- Description:
- IC REG DL BUCK/LNR SYNC 10MSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
TC1304-ZS0EUN from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with sequenced startup/shutdown, 300 ms power-good delay, 65 µA typical quiescent current, and operation from -40°C to +125°C junction temperature - used in portable medical instruments and USB-powered devices requiring tightly coordinated voltage rails.
For engineers reviewing the TC1304-ZS0EUN datasheet, TC1304-ZS0EUN pinout, TC1304-ZS0EUN application, or TC1304-ZS0EUN equivalent, key selection criteria include output sequencing capability, independent LDO/buck shutdown control, 2.0 MHz fixed-frequency PWM operation, 137 mV typical LDO dropout at 200 mA, and compatibility with 1 µF ceramic output capacitors on both rails.
Technical Context
The TC1304-ZS0EUN implements a fixed-frequency 2.0 MHz synchronous buck stage with automatic transition to PFM mode under light load to maintain ultra-low quiescent current, while its integrated LDO delivers stable auxiliary voltage with internal compensation and no external compensation components required. Both regulators are internally compensated and share a common analog ground (AGND) reference.
Its power-good (PG) output monitors both VOUT1 and VOUT2 simultaneously with 94%–96% regulation threshold and 300 ms active timeout, and the single SHDN input initiates controlled sequencing: LDO enables first, then buck regulator - critical for processors requiring ordered rail activation. UVLO (2.55 V nominal) and thermal shutdown (165°C) provide robust system-level protection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Buck Output Current | 500 mA max - supports core logic or microcontroller supply without external current boosting |
| LDO Output Current | 300 mA max - powers I/O peripherals, sensors, or RF sections with low noise and minimal board area |
| Quiescent Current | 65 µA typical - extends battery life in always-on portable systems with dual-rail requirements |
| Switching Frequency | 2.0 MHz fixed - enables use of small 4.7 µH inductors and compact 3×3 mm DFN packaging |
| LDO Dropout Voltage | 137 mV typical @ 200 mA - maintains regulation down to VIN2 = VOUT2 + 0.137 V, easing input supply design |
| Power-Good Delay | 300 ms active timeout - provides reliable processor reset timing after both outputs stabilize |
| Operating Junction Temp | -40°C to +125°C - qualified for industrial and automotive-adjacent embedded applications |
Pinout & Package
TC1304-ZS0EUN is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP), optimized for high-density portable designs. Pin 11 (EP) must be soldered to AGND for thermal performance and electrical stability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SHDN) | Sequenced Shutdown Input | Active-high logic input that triggers controlled LDO-first enable/disable sequence; VIH ≥ 45% VIN, VIL ≤ 15% VIN |
| 2 (VIN2) | LDO Input Supply | Accepts 2.7–5.5 V input; must be routed short and low-impedance to VIN1 to minimize noise coupling |
| 3 (VOUT2) | LDO Regulated Output | Delivers fixed or adjustable LDO voltage (e.g., 1.5/1.8/2.5/3.3 V); requires ≥1 µF ceramic capacitor to AGND |
| 4 (PG) | Power-Good Monitor Output | Open-drain output asserting when both VOUT1 and VOUT2 are within 94–96% of target; 300 ms timeout ensures clean reset |
| 5 (AGND) | Analog Ground Reference | Primary ground return for feedback networks and internal references; must connect directly to low-noise AGND plane |
| 6 (PGND) | Power Ground Return | High-current return path for buck switch node (LX); separate from AGND to avoid switching noise injection |
| 7 (LX) | Buck Switch Node | Connects to external inductor; carries high di/dt switching current - requires tight layout and Kelvin grounding |
| 8 (VIN1) | Buck Input Supply | Accepts 2.7–5.5 V; tied to VIN2 on PCB; UVLO activates below 2.55 V to prevent unstable regulation |
| 9 (VFB1/VOUT1) | Buck Feedback or Output | Configurable: for fixed-output variants, connects directly to VOUT1; for adjustable, accepts resistor divider for 0.8–4.5 V setting |
| 10 (EP) | Exposed Thermal Pad | Internally connected to AGND; mandatory solder connection to PCB thermal plane for θJA = 41°C/W performance |
Key Features
| Feature | Design Value |
|---|---|
| Sequenced Startup/Shutdown | LDO enables before buck regulator during power-up, and disables after buck during shutdown - prevents backfeeding and ensures safe SoC boot |
| Both Outputs Internally Compensated | Eliminates need for external compensation components on either regulator, reducing BOM count and layout complexity |
| 2.0 MHz Fixed-Frequency PWM + PFM Transition | Maintains high efficiency (>90%) at heavy loads while dropping to ultra-low IQ in PFM mode at light loads - ideal for burst-mode systems |
| 300 mA LDO with 137 mV Dropout @ 200 mA | Enables use with low-headroom inputs (e.g., single-cell Li-ion at 3.0 V) while delivering stable 2.5 V or 3.3 V rails |
| Power-Good Monitoring of Both Outputs | Single PG signal asserts only when *both* VOUT1 and VOUT2 meet regulation thresholds - simplifies system reset logic |
Applications
| USB-Powered Portable Instrument | Handheld Medical Device |
|---|---|
Use Scenario: Battery-backed handheld ECG monitor powered via USB-C PD negotiation (5 V input). IC Role / Device Role: Dual-rail PMIC generating 3.3 V for MCU and 1.8 V for ADC/SPI interface, with sequenced enable to prevent digital noise coupling into analog section. Use Value: 65 µA quiescent current extends standby time; 1 µF LDO output cap minimizes board area; PG confirms both rails stable before enabling sensor acquisition. |
Use Scenario: Portable pulse oximeter with OLED display, requiring clean 2.5 V for analog front-end and 3.3 V for display driver. IC Role / Device Role: Single-chip dual-output regulator providing isolated, low-noise supplies with thermal protection for patient-facing equipment. Use Value: LDO's 62 dB PSRR at 100 Hz suppresses switching noise from buck stage; -40°C to +125°C rating supports clinical environment reliability. |
| Industrial IoT Sensor Node | Low-Power Embedded Controller |
Use Scenario: Wireless temperature/humidity node powered by 3.6 V lithium-thionyl chloride battery, transmitting via BLE. IC Role / Device Role: Efficient dual-rail source: buck generates 3.0 V for radio, LDO delivers 1.8 V for ultra-low-power MCU core. Use Value: 2.0 MHz switching allows tiny 4.7 µH inductor; PFM mode reduces IQ to ~38 µA during sleep - extending 10-year battery life. |
Use Scenario: Programmable logic controller (PLC) I/O module with FPGA and isolated communication interfaces. IC Role / Device Role: Primary power sequencer ensuring 1.2 V FPGA core powers before 3.3 V I/O banks, preventing latch-up or configuration failure. Use Value: TC1304-ZS0EUN's explicit sequencing eliminates need for external timers or GPIO-controlled enable sequencing - reducing component count and firmware overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-output PMIC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TC1303C-ZS0EUN | Same dual-regulator architecture but lacks sequencing; PG monitors both outputs, yet SHDN1/SHDN2 pins operate independently | Suitable where independent enable/disable of buck and LDO is required, not strict ordering | Select TC1303C-ZS0EUN if sequencing is unnecessary and separate control over each rail improves system flexibility |
| TPS65023RGTR | Triple-output PMIC (2 buck + 1 LDO); higher IQ (~100 µA); 2.25 MHz switching; requires external compensation on buck channels | Targets more complex SoC platforms needing three rails (e.g., ARM Cortex-A8 with DDR, core, I/O) | Choose TPS65023RGTR only when third regulated output is required and layout can accommodate larger solution size and higher quiescent draw |
Compared with TC1303C-ZS0EUN, TC1304-ZS0EUN adds deterministic sequencing at no cost to efficiency or footprint; versus TPS65023RGTR, it trades one output and higher IQ for lower component count, smaller size, and simpler layout - making it optimal for space-constrained dual-rail applications.
Availability
TC1304-ZS0EUN is available at Aetrix Electronics and suitable for USB-powered devices, handheld medical instruments, and industrial IoT sensor nodes requiring stable component supply across extended product lifecycles.
Supply support for TC1304-ZS0EUN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a leading provider of microcontrollers, analog, and mixed-signal ICs, with deep expertise in power management and embedded control solutions.
The TC1303/TC1304 family was designed specifically for portable and battery-operated systems needing compact, efficient dual-rail power with intelligent monitoring and sequencing - targeting cellular phones, PDAs, and medical handhelds.
FAQ
What is the function of the SHDN pin on the TC1304-ZS0EUN?
The SHDN pin on the TC1304-ZS0EUN is an active-high logic input that initiates sequenced startup and shutdown: during enable, it turns on the LDO first, then the buck regulator; during disable, it shuts down the buck regulator before the LDO. This prevents backfeeding and ensures safe power sequencing for sensitive processors. The TC1304-ZS0EUN requires VIH ≥ 45% of VIN to activate.
Does the TC1304-ZS0EUN support adjustable output voltages?
Yes, the TC1304-ZS0EUN supports adjustable buck output voltage (VOUT1) from 0.8 V to 4.5 V using an external resistor divider connected to the VFB1/VOUT1 pin. The LDO output (VOUT2) is fixed at factory-set values (e.g., 1.5 V, 1.8 V, 2.5 V, or 3.3 V), and the specific value for TC1304-ZS0EUN is confirmed as 3.3 V per Microchip's standard ordering matrix.
How does the power-good (PG) output behave on the TC1304-ZS0EUN?
The PG output on the TC1304-ZS0EUN is an open-drain signal that asserts low only when *both* VOUT1 and VOUT2 are within 94%–96% of their target voltages. It features a 300 ms active timeout period after regulation is achieved, and a 165 µs response delay. This dual-rail monitoring behavior distinguishes TC1304-ZS0EUN from TC1303A/B variants and makes it ideal for systems requiring guaranteed co-regulation before release of reset.
What package type is used for the TC1304-ZS0EUN?
The TC1304-ZS0EUN is supplied in a 10-pin 3×3 mm DFN package with an exposed thermal pad (EP). The EP must be soldered to AGND on the PCB to achieve the specified thermal resistance of 41°C/W and ensure reliable operation at full load. This compact, thermally enhanced package supports high-density portable designs without requiring heatsinks or airflow.
What protection features are integrated into the TC1304-ZS0EUN?
The TC1304-ZS0EUN integrates undervoltage lockout (UVLO) triggering at 2.55 V nominal, overtemperature shutdown at 165°C with 10°C hysteresis, output short-circuit protection on both rails, and internal current limiting on the buck switch (700 mA peak). These protections operate autonomously without external circuitry, enhancing system robustness in unattended or harsh-environment deployments.
TC1304-ZS0EUN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Topology:
- Step-Down (Buck) Synchronous (1), Linear (LDO) (1)
- Number of Outputs:
- 2
- Frequency - Switching:
- 2MHz
- Voltage/Current - Output 1:
- Adj, 500mA
- Voltage/Current - Output 2:
- 1.5V, 300mA
- Voltage/Current - Output 3:
- -
- w/LED Driver:
- No
- w/Supervisor:
- No
- w/Sequencer:
- Yes
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 10-MSOP
TC1304-ZS0EUN FAQ
1.How can I place an order for TC1304-ZS0EUN through Aetrix?
Please submit a Request for Quotation (RFQ) for TC1304-ZS0EUN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC1304-ZS0EUN reliable?
The price and inventory of TC1304-ZS0EUN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC1304-ZS0EUN is usually 5 days.
3.What payment methods are accepted for TC1304-ZS0EUN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC1304-ZS0EUN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC1304-ZS0EUN?
TC1304-ZS0EUN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC1304-ZS0EUN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC1304-ZS0EUN?
For technical support, including TC1304-ZS0EUN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC1304-ZS0EUN requirements.
6.How does Aetrix verify that TC1304-ZS0EUN is sourced from the original manufacturer or authorized distributors?
All TC1304-ZS0EUN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC1304-ZS0EUN meets industry standards.
7.What is the process for return or replacement of TC1304-ZS0EUN?
All TC1304-ZS0EUN units undergo pre-shipment inspection (PSI). If there is an issue with TC1304-ZS0EUN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC1304-ZS0EUN part is unused and in its original packaging.
Return procedure for TC1304-ZS0EUN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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