Microchip Technology TC1304-ZS0EUNTR

Overview

TC1304-ZS0EUNTR from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO), with sequenced startup/shutdown, 300 ms power-good delay, 65 µA typical quiescent current, and operation from -40°C to +125°C junction temperature. It delivers tightly regulated core and bias voltages for portable processors in USB-powered devices.

For engineers reviewing the TC1304-ZS0EUNTR datasheet, TC1304-ZS0EUNTR pinout, TC1304-ZS0EUNTR application, or TC1304-ZS0EUNTR equivalent, key selection criteria include output sequencing capability, dual-regulator efficiency trade-offs, PG monitoring of both outputs, thermal performance in 3×3 DFN, and compatibility with 1 µF LDO output capacitance.

Technical Context

The TC1304-ZS0EUNTR implements independent control logic for buck and LDO sections, enabling precise start-up order: LDO enables first, followed by buck regulator after internal timing. Its power-good circuit monitors both VOUT1 and VOUT2 simultaneously with 94% threshold hysteresis and 300 ms active timeout, supporting processor reset sequencing.

Buck regulation uses fixed 2.0 MHz PWM under heavy load and transitions automatically to PFM mode at light loads to maintain 65 µA total IQ. The LDO features 137 mV dropout at 200 mA and requires only a single 1 µF ceramic output capacitor for stability.

Key Specifications

Pinout & Package

TC1304-ZS0EUNTR is housed in a 10-pin 3×3 mm DFN package with exposed thermal pad (EP) connected to AGND. Pin 1 is SHDN, pin 10 is AGND, and pin 11 is EP - consistent with Microchip's standard 10L-DFN footprint for thermal reliability.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output PMIC applications.

Compared with TPS65023RSBR and RT8059ZSP, TC1304-ZS0EUNTR uniquely integrates sequencing control, dual-regulator topology (buck+LDO), and dual-output PG monitoring in a single 3×3 mm DFN - optimizing size, noise isolation, and reset reliability for portable dual-rail applications.

Availability

TC1304-ZS0EUNTR is available at Aetrix Electronics and suitable for USB-powered devices, handheld medical instruments, and industrial edge controllers requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for TC1304-ZS0EUNTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog, and power management solutions for industrial, automotive, and consumer markets.

The TC1303/TC1304 product line was designed to reduce bill-of-materials and PCB area in space-constrained portable electronics by integrating buck, LDO, sequencing, and power-good functions into a single 10-pin DFN.

FAQ

What is the function of the SHDN pin on the TC1304-ZS0EUNTR?

The SHDN pin on the TC1304-ZS0EUNTR is an active-high global shutdown input that initiates controlled sequencing: it enables the LDO output first, then the buck regulator after an internal delay. This ensures proper power-up order for systems requiring auxiliary bias before core voltage. The pin accepts logic-high >45% of VIN to activate and logic-low <15% of VIN to disable both regulators.

Does the TC1304-ZS0EUNTR support adjustable output voltages?

Yes, the TC1304-ZS0EUNTR supports adjustable buck output voltage (VOUT1) from 0.8 V to 4.5 V using an external resistor divider connected to the VFB1/VOUT1 pin. The LDO output (VOUT2) is factory-configured to a fixed voltage - the "ZS0" suffix indicates 3.3 V for VOUT2. Datasheet DS21949C confirms this configuration for TC1304-ZS0EUNTR.

How does the power-good (PG) output behave on the TC1304-ZS0EUNTR?

The PG output on the TC1304-ZS0EUNTR is an open-drain signal that asserts low when both VOUT1 and VOUT2 are within 94% of their nominal values. It includes a 300 ms active timeout period and 165 µs delay, making it suitable for driving processor reset inputs. Unlike TC1303B, TC1304-ZS0EUNTR uses open-drain PG - requiring an external pull-up resistor.

What thermal performance can be expected from the TC1304-ZS0EUNTR in its DFN package?

The TC1304-ZS0EUNTR in its 10-lead 3×3 mm DFN package achieves a typical junction-to-ambient thermal resistance (θJA) of 41°C/W on a 4-layer PCB with internal ground plane and two thermal vias under the exposed pad. This allows continuous 500 mA buck operation at ambient temperatures up to +85°C with proper layout - confirmed in DS21949C page 10.

Can the TC1304-ZS0EUNTR operate with input voltage below 2.7 V?

No, the TC1304-ZS0EUNTR has a minimum input voltage specification of 2.7 V per Absolute Maximum Ratings and Electrical Characteristics tables in DS21949C. Below this, undervoltage lockout (UVLO) activates at 2.4–2.7 V (typical 2.55 V), disabling both regulators. This threshold is fixed and non-adjustable.