Microchip Technology TC1313-ZP0EUN

Overview

TC1313-ZP0EUN from Microchip Technology is a dual-output power management IC integrating a 500 mA synchronous buck regulator and a 300 mA low-dropout linear regulator (LDO) in a single 10-pin DFN package. It delivers adjustable (0.8–4.5 V) or fixed-output voltages (e.g., 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V) for buck and fixed 1.5–3.3 V for LDO, with total quiescent current of 57 µA typical and operating junction temperature range of –40°C to +125°C. It serves as a compact, low-noise dual-rail supply for battery-powered portable electronics requiring independent core and I/O voltage rails.

For engineers reviewing the TC1313-ZP0EUN datasheet, TC1313-ZP0EUN pinout, TC1313-ZP0EUN application, or TC1313-ZP0EUN equivalent, key selection considerations include its 2.0 MHz fixed-frequency PWM operation with automatic PFM transition, 137 mV typical LDO dropout at 200 mA, independent shutdown control per output, internal compensation, and UVLO/overtemperature/short-circuit protection - all critical for space-constrained, efficiency-sensitive designs.

Technical Context

The TC1313-ZP0EUN implements a current-mode synchronous buck regulator with integrated P-channel and N-channel MOSFETs (R_DS(on) = 450 mΩ each), operating at 2.0 MHz (±0.4 MHz) under heavy load and transitioning automatically to pulse-frequency modulation (PFM) mode below ~30 mA load to maintain ultra-low quiescent current (38 µA typical). Its LDO section uses a PMOS pass device with 137 mV typical dropout at 200 mA and supports ceramic output capacitors as small as 1 µF.

Both regulators feature independent logic-level shutdown inputs (SHDN1/SHDN2), undervoltage lockout (UVLO = 2.55 V nominal, 200 mV hysteresis), and thermal shutdown at 165°C (10°C hysteresis). The device separates analog ground (AGND) and power ground (PGND) to minimize noise coupling, and includes an exposed thermal pad (EP) tied to AGND in the DFN package for enhanced thermal performance.

Key Specifications

Pinout & Package

TC1313-ZP0EUN is packaged in a 3×3 mm, 10-pin DFN with exposed thermal pad (EP), pin-compatible with the MSOP variant but optimized for thermal performance and board area reduction. The EP must be soldered to AGND via multiple vias for reliable thermal dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-output regulator applications.

Compared with TPS65023BRSBR and RT8059ZSP, TC1313-ZP0EUN uniquely balances ultra-low quiescent current (57 µA), integrated low-noise LDO, and compact DFN footprint - making it optimal for space- and battery-limited dual-rail applications where one rail powers noise-sensitive analog/RF circuitry.

Availability

TC1313-ZP0EUN is available at Aetrix Electronics and suitable for cellular phones, handheld medical instruments, and USB-powered peripherals requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.

Supply support for TC1313-ZP0EUN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a leading provider of microcontrollers, analog, and Flash-IP solutions, emphasizing reliability, longevity, and design-in support for industrial, automotive, and consumer applications.

The TC1313 product line was designed specifically for portable and battery-operated systems requiring dual, independently controlled voltage rails with minimal external components and ultra-low quiescent current - targeting medical, wearables, and handheld computing markets.

FAQ

What output voltage options does the TC1313-ZP0EUN support?

The TC1313-ZP0EUN supports adjustable buck output from 0.8 V to 4.5 V (via external resistor divider on VFB/VOUT1) and fixed buck outputs of 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, or 3.3 V. The LDO output is fixed only: 1.5 V, 1.8 V, 2.5 V, or 3.3 V. The specific configuration for TC1313-ZP0EUN is factory-set and indicated by the suffix 'ZP0EUN' - confirming it is the 1.8 V buck / 3.3 V LDO variant in 10-pin DFN packaging.

How does the TC1313-ZP0EUN manage efficiency across varying load conditions?

The TC1313-ZP0EUN uses automatic mode transition: it operates in fixed 2.0 MHz PWM mode above ~80 mA load for >90% efficiency and low ripple, then seamlessly shifts to PFM mode below ~30 mA to reduce quiescent current to 38 µA (buck) and 44 µA (LDO). This dual-mode architecture ensures high efficiency at both full load and standby - a key advantage of TC1313-ZP0EUN in battery-powered applications with intermittent processing bursts.

Can the TC1313-ZP0EUN's buck and LDO outputs be enabled independently?

Yes. TC1313-ZP0EUN features two independent logic-level shutdown pins: SHDN1 controls the buck regulator and SHDN2 controls the LDO. Both accept active-high signals (>45% VIN to enable, <15% VIN to disable), allowing precise power sequencing - for example, enabling the LDO first to power bias circuitry before bringing up the buck rail for the processor core. This capability is intrinsic to the TC1313-ZP0EUN design.

What is the minimum input voltage required for TC1313-ZP0EUN to regulate its outputs?

The minimum input voltage for TC1313-ZP0EUN depends on the selected output voltages and load. Per datasheet constraints: VIN must be ≥ 2.7 V and also ≥ V_OUT + V_DROPOUT. For the TC1313-ZP0EUN's 1.8 V buck output, dropout is 280 mV at 500 mA, so VIN must be ≥ 2.08 V - but the absolute minimum remains 2.7 V. For its 3.3 V LDO output, dropout is 137 mV at 200 mA, requiring VIN ≥ 3.437 V to sustain full load. Thus, 2.7–5.5 V input range applies, with practical minimum dictated by worst-case rail and load.

Does TC1313-ZP0EUN require external compensation components?

No. TC1313-ZP0EUN integrates full compensation for both regulators. The buck regulator's current-mode control loop and the LDO's error amplifier are internally compensated - eliminating external capacitors or resistors typically needed for stability. This simplifies layout, reduces BOM cost, and ensures consistent performance across temperature and process variation, a verified characteristic of the TC1313-ZP0EUN silicon design.