Toshiba Semiconductor and Storage TC358748XBG(EL)

Overview

TC358748XBG from Toshiba Electronic Devices & Storage Corporation is a configurable MIPI CSI-2 ↔ parallel video bridge IC used in camera interface subsystems. It supports bidirectional conversion between 4-lane CSI-2 (up to 1 Gbps/lane) and 24-bit parallel interfaces, operates with 1.2 V core/MIPI and 1.8 V or 3.3 V I/O supplies, and delivers 93 mW power consumption in CSI-2 RX → parallel output mode at 100 MHz PCLK.

For engineers reviewing the TC358748XBG datasheet, TC358748XBG pinout, TC358748XBG application, or TC358748XBG equivalent, this device is selected for mobile imaging, scanner systems, and legacy camera integration where low-power serial-to-parallel translation and flexible register configuration via I²C/SPI are required.

Technical Context

The TC358748XBG implements a dual-mode bridge architecture: when MSEL = 0, it functions as a CSI-2 RX receiver converting serialized camera data to parallel output; when MSEL = 1, it acts as a CSI-2 TX transmitter translating parallel input (e.g., from analog TV or specialty cameras) into compliant MIPI CSI-2 packets. Its internal D-PHY layer supports LP11 clock/data lane states and full CSI-2 protocol compliance per v1.01.

Configuration is handled exclusively through I²C (CS = L) or SPI (CS = H, MSEL = 1), with all registers accessible in both modes. The device integrates three GPIOs configurable either as CSI-2 control signals (MCLK/CXRST/XShutdown) or as parallel interface interrupt/control lines, enabling tight system-level synchronization without external logic.

Key Specifications

Pinout & Package

TC358748XBG uses an 80-ball Very Thin Fine-Pitch Ball Grid Array (P-VFBGA80-0707-0.65-001) with 0.65 mm pitch, 7.0 × 7.0 mm body size, and 1.0 mm maximum height.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar video interface bridge applications.

Compared with TC358746AXBG, TC358748XBG offers larger package real estate for improved thermal dissipation and enhanced GPIO routing; compared with TC9591XBG, it trades extended temperature capability for lower unit cost and qualification scope in commercial mobile applications.

Availability

TC358748XBG is available at Aetrix Electronics and suitable for mobile imaging subsystems, document scanner interfaces, and analog-to-MIPI video bridge applications requiring stable component supply across production lifecycles.

Supply support for TC358748XBG includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Toshiba Electronic Devices & Storage Corporation designs high-performance semiconductor solutions for imaging, power management, and connectivity applications, with global manufacturing and quality certification aligned to automotive and industrial standards.

The TC358748XBG belongs to Toshiba's Mobile Peripheral Devices product line, engineered specifically to simplify high-speed video interface translation between legacy parallel architectures and modern MIPI-based SoCs in space- and power-constrained systems.

FAQ

What is the primary function of the TC358748XBG?

The TC358748XBG is a configurable bidirectional video interface bridge IC that converts between MIPI CSI-2 serial data (up to 4 lanes at 1 Gbps each) and 24-bit parallel video formats. It operates in either CSI-2 RX → parallel output mode or parallel input → CSI-2 TX mode, selected by the MSEL pin. This enables seamless integration of MIPI cameras into legacy parallel systems or adaptation of analog/specialty cameras to MIPI-enabled application processors. The TC358748XBG handles protocol translation, timing synchronization, and format mapping without external FPGA logic.

Does the TC358748XBG support both RGB and RAW video formats?

Yes, the TC358748XBG supports RGB888/666/565, YUV422 (ITU BT.656/BT.601), YUV444, and RAW8/10/12/14 formats in both directions. In CSI-2 RX → parallel mode, it accepts RAW8–14, YUV422, and RGB on the MIPI side and outputs them on the 24-bit parallel bus. In parallel → CSI-2 TX mode, it accepts the same formats on the parallel side and packages them into CSI-2 data packets. Format selection is register-configurable via I²C or SPI, and the TC358748XBG preserves native bit depth and timing alignment.

What are the power supply requirements for the TC358748XBG?

The TC358748XBG requires three independent supply rails: 1.2 V for the digital core and MIPI D-PHY circuitry, and a selectable 1.8 V or 3.3 V for the I/O domain (parallel bus, GPIOs, I²C/SPI). These voltages must remain within ±10% tolerance under load. The device draws 93 mW typical in CSI-2 RX → parallel output mode (1080P60, PCLK = 100 MHz) and 79 mW in parallel → CSI-2 TX mode (same resolution/fps). Power sequencing is not strictly required, but VDDC and VDD_MIPI should stabilize before VDDIO.

How is the TC358748XBG configured for operation mode and register access?

Operation mode (CSI-2 RX → parallel or parallel → CSI-2 TX) is set by the hardware MSEL pin: low selects RX mode, high selects TX mode. Register configuration is performed via I²C (when CS = L) supporting 100 kHz, 400 kHz, and 1 MHz modes, or via SPI (when CS = H and MSEL = H) operating up to 25 MHz. All internal registers-including video format, lane count, clock dividers, and GPIO assignments-are accessible through either interface. No boot ROM or external configuration EEPROM is required; initialization is fully software-controlled.

What package type and pin count does the TC358748XBG use?

The TC358748XBG uses an 80-ball Very Thin Fine-Pitch Ball Grid Array (P-VFBGA80-0707-0.65-001) with 0.65 mm solder ball pitch, 7.0 × 7.0 mm body dimensions, and 1.0 mm maximum height. It shares identical pinout and mechanical footprint with TC9591XBG. The package includes 27 parallel data pins (PD[23:0]), 10 MIPI CSI-2 differential pins (clock + 4 lanes × 2), 4 system pins (MSEL, CS, RESX, REFCLK), 2 I²C/SPI pins, 3 GPIOs, and 9 power/ground connections - totaling 80 balls. Thermal pad is not present; thermal dissipation relies on solder ball conduction.