Microchip Technology TC520ACPD

Overview

TC520ACPD from Microchip Technology is a serial interface adapter IC designed to manage phase control signals (A, B, CMPTR) for TC500/TC500A/TC510/TC514 dual-slope integrating A/D converters. It supports programmable conversion rate and resolution up to 17-bit accuracy plus polarity bit, operates from a single 5V supply, and delivers low power consumption (typ. 0.8 mA). It enables polled or interrupt-mode host communication via a 3-wire serial port in computer peripheral and portable instrument data acquisition systems.

For engineers reviewing the TC520ACPD datasheet, TC520ACPD pinout, TC520ACPD application, or TC520ACPD equivalent, key selection considerations include its 14-pin PDIP package, 0°C to +70°C temperature range, 18-bit shift register with overrange/polarity bits, DV output for data-ready signaling, and compatibility with external crystal (1–4 MHz) or clock source (up to 6 MHz).

Technical Context

The TC520ACPD implements a dedicated state machine and 16-bit counter to sequence the four-phase conversion cycle (Auto Zero, Integrate, De-integrate, Integrator Zero) of connected TC5xx A/D converters. Its internal SYSCLK is derived by dividing the OSCIN/OSCOUT input frequency by 4, enabling precise timing control of integration time (TINT) and auto-zero time (TAZ) via an 8-bit LOAD VALUE.

Communication occurs over a 3-wire serial interface (DIN/DOUT/DCLK) with READ- and LOAD-controlled data loading and shift register access. The DV output provides active-low indication of Auto Zero phase entry-serving as either a polled status flag or hardware interrupt trigger-while CE enables conversion suspension without disrupting integrator discharge integrity.

Key Specifications

Pinout & Package

TC520ACPD is housed in a 14-pin plastic dual in-line package (PDIP), with 0.300-inch body width and standard through-hole mounting. Pin 1 is marked by a notch or dot; pin numbering follows counterclockwise convention from top-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial interface adapter applications.

Compared with TC520ACOE, TC520ACPD offers identical core functionality in a through-hole package ideal for manual assembly and test fixtures; versus MAX1241CPE+, TC520ACPD enables higher-resolution, low-noise measurements via external TC5xx converters but requires additional components and layout coordination.

Availability

TC520ACPD is available at Aetrix Electronics and suitable for computer peripheral interface, portable instrument data acquisition, and industrial data acquisition system applications requiring stable component supply and long-term obsolescence management.

Supply support for TC520ACPD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and interface ICs, headquartered in Chandler, Arizona, with global design and manufacturing operations certified to ISO/TS-16949.

The TC520A product line was developed specifically to simplify integration of Microchip's TC500-family dual-slope A/D converters by handling timing-critical phase control and serial data formatting in hardware.

FAQ

What is the primary function of the TC520ACPD in a data acquisition system?

The TC520ACPD serves as a dedicated serial interface adapter that manages the four-phase conversion cycle (Auto Zero, Integrate, De-integrate, Integrator Zero) of TC500/TC500A/TC510/TC514 A/D converters. It relieves the host processor of real-time timing control by generating A/B phase signals, capturing comparator feedback via CMPTR, and serializing 18-bit conversion results (including overrange and polarity bits) for host retrieval. This function is central to the TC520ACPD's role in reducing firmware complexity and improving measurement repeatability.

How does the TC520ACPD achieve up to 17-bit resolution?

The TC520ACPD itself does not perform analog-to-digital conversion but enables up to 17-bit resolution by precisely controlling the integration time (TINT) and auto-zero time (TAZ) of the connected TC5xx A/D converter. This is accomplished via an 8-bit LOAD VALUE programmed into its internal 16-bit counter - where the upper byte sets the count value (256–65536) applied to both TINT and TAZ phases. Longer counts increase resolution at the expense of conversion speed, and the TC520ACPD passes the resulting 16-bit data word plus overrange and polarity bits as an 18-bit serial stream.

Can the TC520ACPD operate without an external crystal?

Yes, the TC520ACPD can operate without an external crystal by accepting an external clock signal applied to the OSCIN pin (with OSCOUT left floating). The device supports external clock frequencies up to 6.0 MHz, provided the signal meets specifications: ≥30% duty cycle, rise/fall times ≤15 ns, and amplitude between 0 V and VIH. When using a crystal, it must be an AT-cut type (1–4 MHz) connected between OSCIN and OSCOUT; the internal oscillator circuit then generates SYSCLK at one-quarter the crystal frequency.

What is the purpose of the DV pin on the TC520ACPD?

The DV (Data Valid) pin on the TC520ACPD is an active-low output that asserts at the start of each Auto Zero phase, indicating that the 18-bit shift register has just been updated with the most recent conversion result. This signal serves dual purposes: it can be polled by the host processor to determine when new data is ready, or connected to an interrupt request (IRQ) line to trigger immediate data retrieval. Because Auto Zero is the first phase of every conversion cycle, DV provides deterministic timing for data capture without requiring knowledge of full conversion duration.

Why must the CE pin be asserted only when DV is low?

The CE (Convert Enable) pin on the TC520ACPD must be pulled high only when DV is low - i.e., during the Auto Zero phase - to ensure safe suspension of conversion without corrupting the integrator capacitor charge. If CE is asserted mid-cycle (e.g., during Integrate or De-integrate), the integrator may retain residual voltage, leading to excessive discharge time and erroneous subsequent conversions. The DV signal provides hardware-enforced synchronization: holding CE high during DV = low forces the TC520ACPD into a known AZ state, allowing safe multiplexer reconfiguration or host intervention before the next full conversion begins.