Microchip Technology TC7109ACLW713
- Part No.:
- TC7109ACLW713
- Manufacturer:
- Microchip Technology
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 44-LCC (J-Lead)
- Datasheet:
-
TC7109ACLW713.pdf
- Description:
- IC ADC 12BIT DUAL SLOPE 44PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:2,157
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TC7109ACLW713 from Microchip Technology is a 12-bit plus sign dual-slope integrating analog-to-digital converter (ADC) with true differential input and reference, 15 μVP-P typical input noise, 1 pA typical input bias current, and zero-integrator cycle for fast overload recovery. It operates with ±5 V supplies and is used in precision bridge-based sensor interfaces such as load cells and strain gauges.
For engineers reviewing the TC7109ACLW713 datasheet, TC7109ACLW713 pinout, TC7109ACLW713 application, or TC7109ACLW713 equivalent, key selection considerations include its differential measurement capability, auto-zero architecture, UART handshake mode for serial data logging, and compatibility with 40-pin PLCC packaging and industrial temperature range (0°C to +70°C).
Technical Context
The TC7109ACLW713 implements a four-phase dual-slope conversion cycle: Auto-Zero (AZ), Signal Integrate (INT), Reference De-integrate (DE), and Zero Integrator (ZI). Its AZ phase achieves <10 μV input-referred offset via closed-loop compensation of buffer, integrator, and comparator offsets.
ZI phase activation eliminates residual integrator charge after over-range inputs-preventing cross-talk in multiplexed systems and enabling reliable thermocouple monitoring. The device supports both Direct parallel interface (via CE/LOAD, HBEN, LBEN) and UART Handshake mode (MODE HIGH, SEND-controlled), with buffered oscillator output (BUFF OSC OUT) usable for RUN/HOLD synchronization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit plus sign (4096 counts + polarity), sign-magnitude coding format |
| Input Noise | 15 μVP-P typical - enables sub-10 μV resolution in low-drift sensor front-ends |
| Input Bias Current | 1 pA typical - preserves accuracy with high-impedance transducers (e.g., piezoresistive bridges) |
| Overload Recovery | Zero integrator cycle - eliminates hysteresis between successive channels in multiplexed systems |
| Reference Output | -2.8 V (ref. to V+), ±80 ppm/°C - stable internal reference for ratiometric measurements |
| Supply Current | 700–1500 μA - ultra-low power suitable for battery-backed or energy-constrained DAQ systems |
| CMRR | 50 μV/V (86 dB typical) - rejects common-mode interference in noisy industrial environments |
Pinout & Package
TC7109ACLW713 is housed in a 44-pin PLCC (Plastic Leaded Chip Carrier) package with gull-wing leads, rated for 0°C to +70°C operation. Pin assignments follow the standard 40-pin DIP functional mapping, with NC (no internal connection) on pins 33 and 34 per PLCC layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pin 1) | Digital ground reference | 0 V return for all digital logic; must be isolated from analog ground to prevent noise coupling |
| STATUS (Pin 2) | Conversion status flag | High during INT/DE phases; goes low when latched data is stable - used as "data valid" interrupt source |
| POL (Pin 3) | Polarity indicator | High = positive input voltage relative to COMMON; required for signed result interpretation |
| OR (Pin 4) | Over-range flag | Three-state output asserted high when input exceeds full-scale range - triggers fault handling without software polling |
| B1–B12 (Pins 5–16) | Data outputs | TTL-compatible, byte-organized tri-state outputs: B1–B8 (low byte), B9–B12 + POL + OR (high byte) |
| MODE (Pin 21) | Interface mode select | LOW = Direct parallel mode; HIGH = UART Handshake mode - no external logic needed for serial interfacing |
| RUN/HOLD (Pin 26) | Conversion timing control | High = continuous conversion; LOW = pause after de-integrate - enables synchronized sampling or power gating |
| IN HI / IN LO (Pins 35 / 34) | Differential analog input | True differential pair referenced to COMMON - rejects common-mode noise in bridge sensor configurations |
| REF IN+ / REF IN− (Pins 36 / 39) | Differential reference input | Accepts external reference or internal REF OUT; enables ratiometric measurement against excitation source |
Key Features
| Feature | Design Value |
|---|---|
| Zero integrator cycle | Eliminates residual charge after over-range events - prevents >0.5-count crosstalk error in multiplexed thermocouple or strain gauge arrays |
| Auto-zero architecture | Sub-10 μV input-referred offset drift (<0.2 μV/°C) - removes need for periodic zero calibration in embedded instrumentation |
| True differential input & reference | Supports bridge transducers with common-mode rejection up to 86 dB - enables direct connection to load cells without external instrumentation amps |
| UART handshake mode | Native TTL-level handshaking (CE/LOAD, HBEN, LBEN as outputs) - interfaces directly to HD6403/CDP1854 UARTs for remote data logging |
| Low-noise, low-bias frontend | 15 μVP-P noise + 1 pA input leakage - preserves signal integrity with high-Z sensors (e.g., RTDs, piezoelectric elements) |
Applications
| Industrial Weigh Scales | Thermocouple Data Loggers |
|---|---|
Use Scenario: High-accuracy weight measurement using 4-wire load cell bridges in factory floor scales. IC Role / Device Role / Timing Role: Dual-slope ADC digitizes mV-level differential output; auto-zero and ZI phases suppress thermal EMF and lead resistance errors. Use Value: Achieves ≤0.01% linearity over temperature without external trimming - reduces calibration labor and field drift in certified weighing systems. | Use Scenario: Multi-channel temperature monitoring in HVAC control panels with open thermocouple detection. IC Role / Device Role / Timing Role: Measures thermocouple voltage vs. cold-junction reference; OR flag detects broken wires; ZI phase prevents channel-to-channel contamination. Use Value: Enables unattended 24/7 operation with automatic fault reporting - eliminates false alarms from transient overloads during channel switching. |
| Strain Gauge Test Benches | Portable Multimeters |
Use Scenario: Static and dynamic strain analysis on structural components using quarter/half/full Wheatstone bridges. IC Role / Device Role / Timing Role: Digitizes low-level bridge imbalance signals; differential REF IN+/REF IN− allows ratiometric excitation tracking. Use Value: Delivers 12-bit resolution with <1 μV/°C drift - supports traceable metrology-grade measurements without ovenized references. | Use Scenario: Battery-powered handheld multimeter requiring low power, high noise immunity, and serial telemetry. IC Role / Device Role / Timing Role: Core ADC in 3½-digit DMM; UART handshake mode streams readings to Bluetooth module with minimal MCU overhead. Use Value: 700 μA supply current extends battery life >200 hours; integrated REF OUT eliminates external voltage reference IC. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar integrating ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX134ACPP | 18-bit sigma-delta architecture; higher resolution but slower conversion (100 ms); requires external reference | Used in laboratory-grade DMMs where resolution >16 bits is mandatory; lacks ZI phase for overload recovery | Select MAX134ACPP only when 18-bit resolution outweighs need for fast overload recovery and self-contained reference |
| ICL7109CPLZ | Pin-compatible predecessor; lower IOUT (100 μA vs. 700 μA); no improved overload recovery or buffered oscillator output | Suitable for legacy designs with existing PLCC footprints and relaxed drive requirements; not recommended for new designs | TC7109ACLW713 replaces ICL7109CPLZ directly in new designs requiring higher drive strength and faster overload recovery |
Compared with MAX134ACPP, TC7109ACLW713 offers deterministic 8192-clock-cycle timing and built-in overload recovery at lower cost and power, while ICL7109CPLZ lacks the enhanced output drive and ZI phase critical for multiplexed industrial sensing.
Availability
TC7109ACLW713 is available at Aetrix Electronics and suitable for industrial weigh scales, thermocouple data loggers, strain gauge test benches, and portable multimeters requiring stable component supply across extended production lifecycles.
Supply support for TC7109ACLW713 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and interface ICs for industrial, automotive, and consumer applications.
The TC7109A product line was designed specifically for high-accuracy, low-drift, dual-slope integrating ADC applications in sensor signal conditioning - emphasizing robustness in noisy environments and minimal external component count.
FAQ
What is the operating temperature range for the TC7109ACLW713?
The TC7109ACLW713 is specified for 0°C to +70°C operation, consistent with its PLCC packaging and industrial-grade qualification. This range supports deployment in factory automation equipment, test instruments, and commercial-grade data acquisition modules where ambient temperatures remain within standard office or controlled industrial environments. The device's drift specifications (e.g., TCZS < 1 μV/°C) are guaranteed across this full range.
Does the TC7109ACLW713 require external zero adjustment?
No, the TC7109ACLW713 does not require external zero adjustment. Its auto-zero architecture actively compensates for offset voltage in the buffer amplifier, integrator, and comparator during each conversion cycle, achieving <10 μV input-referred offset without manual trimming. This eliminates production calibration steps and ensures long-term stability - a key advantage over non-auto-zeroing ADCs like the original ICL7109.
How does the UART handshake mode work on the TC7109ACLW713?
In UART handshake mode, the TC7109ACLW713 configures CE/LOAD, HBEN, and LBEN as TTL-compatible outputs that sequence high- and low-byte data transfers to industry-standard UARTs (e.g., HD6403). The SEND input monitors the UART's TBRE (transmitter buffer register empty) signal, pausing transmission until the UART is ready - eliminating data loss without CPU intervention. This mode is activated by holding MODE high or pulsing it high during conversion.
What is the purpose of the Zero Integrator (ZI) phase in the TC7109ACLW713?
The Zero Integrator (ZI) phase in the TC7109ACLW713 clears residual charge from the integrator capacitor after an over-range input event. Without ZI, this charge would transfer to the auto-zero capacitor and corrupt the next conversion - causing measurable crosstalk in multiplexed systems. ZI activates automatically post-overload and lasts ≤1024 clock cycles, ensuring accurate subsequent readings even with broken thermocouples or saturated bridge sensors.
Can the TC7109ACLW713 operate with a single supply?
No, the TC7109ACLW713 requires dual supplies: V+ nominally +5 V and V− nominally −5 V relative to GND. Its analog section relies on symmetric rails to support ±4 V integrator swing and true differential input operation. Attempting single-supply operation violates absolute maximum ratings (e.g., V− must be ≤ −9 V) and will cause functional failure or permanent damage. A charge pump or isolated DC/DC converter is required for bipolar supply generation.
TC7109ACLW713 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 44-LCC (J-Lead)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 30
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- Parallel
- Configuration:
- ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- Dual Slope
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 44-PLCC (16.59x16.59)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
TC7109ACLW713 FAQ
1.How can I place an order for TC7109ACLW713 through Aetrix?
Please submit a Request for Quotation (RFQ) for TC7109ACLW713 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC7109ACLW713 reliable?
The price and inventory of TC7109ACLW713 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC7109ACLW713 is usually 5 days.
3.What payment methods are accepted for TC7109ACLW713?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC7109ACLW713 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC7109ACLW713?
TC7109ACLW713 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC7109ACLW713 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC7109ACLW713?
For technical support, including TC7109ACLW713 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC7109ACLW713 requirements.
6.How does Aetrix verify that TC7109ACLW713 is sourced from the original manufacturer or authorized distributors?
All TC7109ACLW713 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC7109ACLW713 meets industry standards.
7.What is the process for return or replacement of TC7109ACLW713?
All TC7109ACLW713 units undergo pre-shipment inspection (PSI). If there is an issue with TC7109ACLW713, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC7109ACLW713 part is unused and in its original packaging.
Return procedure for TC7109ACLW713:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TC7109ACLW713 Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

