Toshiba Semiconductor and Storage TC7MPB9307FK(EL)
- Part No.:
- TC7MPB9307FK(EL)
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 20-VFSOP (0.118", 3.00mm Width)
- Datasheet:
-
TC7MPB9307FK(EL).pdf
- Description:
- IC BUS SWITCH 8 X 1:1 20VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:5,249
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
TC7MPB9307FK(EL) from Toshiba Electronic Devices & Storage Corporation is an 8-bit dual-supply CMOS bus switch enabling bidirectional level translation between VCCA (1.65–5.0 V) and VCCB (2.3–5.5 V), with 5.0 Ω typical ON-resistance, 5.5 V-tolerant OE input, and VSSOP-20 package. It serves as a voltage-isolated interface in mixed-voltage digital systems such as FPGA-to-ASIC interconnects.
For engineers reviewing the TC7MPB9307FK(EL) datasheet, TC7MPB9307FK(EL) pinout, TC7MPB9307FK(EL) application, or TC7MPB9307FK(EL) equivalent, key selection criteria include verified dual-supply operating ranges, guaranteed ON-resistance at multiple VCCA/VCCB combinations, OE power-down protection, and US20 package thermal and routing constraints.
Technical Context
The TC7MPB9307FK(EL) implements an 8-channel n-MOSFET-based analog switch architecture with independent VCCA and VCCB rails, supporting level-shifting without direction control logic. Its OE input is referenced to VCCA but tolerates up to 5.5 V regardless of supply state, enabling safe operation during power sequencing.
All eight channels operate simultaneously under a single OE signal; no internal logic or latching is present. Bidirectional signal flow relies on external pull-up resistors tied to either VCCA or VCCB, and the device imposes no restriction on relative magnitude between An and Bn voltages-only that VCCA < VCCB per operating specification.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCCA Range | 1.65 V to 5.0 V - supports 1.8 V/2.5 V/3.3 V logic domains on A-side |
| VCCB Range | 2.3 V to 5.5 V - compatible with 2.5 V/3.3 V/5.0 V B-side interfaces |
| RON (typ.) | 5.0 Ω @ VCCA = 3.0 V, VCCB = 4.5 V - ensures <150 mV voltage drop at 30 mA per channel |
| OE Tolerance | 5.5 V absolute max - enables direct connection to 5 V control logic even when VCCA is 1.8 V |
| Propagation Delay | 0.3–2.2 ns - determined solely by RON × CL (CL = 30 pF), no intrinsic logic delay |
| Input Capacitance | 3 pF (typ.) - minimizes loading on driving source across all voltage combinations |
| Operating Temp | −40 °C to +85 °C - qualified for industrial ambient environments |
Pinout & Package
VSSOP-20 (US20) package: 4.4 mm × 2.9 mm footprint, 0.5 mm pitch, 0.6 mm max height, 0.03 g mass. Exposed pad not present; standard JEDEC-compliant leadframe.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4, 5, 6, 7, 8 | A-side data inputs/outputs | Bidirectional analog switch terminals - connect to lower-voltage domain (VCCA) |
| 9 | GND | Common reference for VCCA supply and OE logic threshold |
| 10, 11, 12, 13, 14, 15, 16, 17 | B-side data inputs/outputs | Bidirectional analog switch terminals - connect to higher-voltage domain (VCCB) |
| 18 | VCCA | Power supply for A-side interface and internal level-shifted OE buffer |
| 19 | OE | Active-Low enable - 5.5 V tolerant, referenced to VCCA, controls all 8 channels |
| 20 | VCCB | Power supply for B-side interface and switch channel conduction path |
Key Features
| Feature | Design Value |
|---|---|
| True bidirectional level shifting | Enables signal translation both up (A→B) and down (B→A) using only external pull-ups - no direction pin or internal biasing required |
| VCCA < VCCB constraint compliance | Guaranteed functionality only when VCCA is strictly less than VCCB - prevents reverse current flow and latch-up risk |
| Zero static power in OFF state | IOFF ≤ ±1.0 µA per channel - eliminates standby current leakage between isolated domains |
| ESD-protected inputs | HBM ≥ 2000 V on all pins - meets IEC 61000-4-2 Level 2 for board-level robustness |
| Low capacitive loading | CI/O(ON) = 14 pF, CI/O(OFF) = 7 pF - preserves signal integrity at >100 MHz edge rates |
Applications
| Industrial PLC I/O Modules | FPGA-to-Microcontroller Interfacing |
|---|---|
Use Scenario: Isolating 3.3 V FPGA I/O banks from legacy 5 V sensor/actuator interfaces while maintaining real-time data throughput. IC Role / Device Role / Timing Role: Voltage-domain translator and bus isolation switch - passes TTL/CMOS signals without buffering or timing skew. Use Value: Eliminates need for discrete level-shifter ICs or resistor-divider networks, reducing BOM count and PCB area by 40% vs. dual-chip solutions. | Use Scenario: Connecting a 1.8 V ARM Cortex-M7 microcontroller to a 2.5 V ADC subsystem in portable medical instrumentation. IC Role / Device Role / Timing Role: Low-latency, low-power bidirectional bus switch - provides sub-nanosecond propagation delay with no added jitter. Use Value: Maintains signal fidelity for 16-bit ADC sampling clocks and data lines, avoiding setup/hold violations at 20 MSPS sample rates. |
| Automotive Infotainment Backplane | Server Memory Subsystem Bridging |
Use Scenario: Interfacing 2.5 V infotainment SoC GPIOs with 3.3 V display timing controller in ADAS dashboards. IC Role / Device Role / Timing Role: Power-aware bus switch - enables selective domain isolation during sleep mode via OE control. Use Value: Reduces quiescent current to <10 µA per channel during system suspend, extending battery runtime in always-on displays. | Use Scenario: Bridging DDR3 memory controller (1.5 V) to legacy 1.8 V buffer ICs in enterprise storage RAID controllers. IC Role / Device Role / Timing Role: High-speed, low-RON switch - sustains clean signal edges across 8-bit address/data paths at 800 MT/s. Use Value: Achieves <50 mV noise margin at 1 GHz toggle rate due to 5.0 Ω RON and 3 pF CIN, preventing bit errors in ECC-critical paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-supply bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74AVCH8T245RHLR | Auto-direction sensing, 3-state outputs, 1.2–3.6 V A-side / 1.65–3.6 V B-side - narrower voltage range, no 5 V support | Requires no OE control but adds direction detection latency; unsuitable for true bidirectional AC-coupled signals | Select when automatic direction control is preferred over manual OE and 5 V compatibility is unnecessary |
| PI4ULS3V502AQ | 5 V-tolerant I/O, 1.2–3.6 V core, 10 Ω RON (typ.), QFN-20 package - higher ON-resistance, no VCCB > VCCA constraint | Supports VCCB ≤ VCCA configurations; lacks explicit power-down protection on enable pin | Select when symmetric voltage operation or smaller thermal resistance (QFN) outweighs need for lowest RON and OE robustness |
Compared with SN74AVCH8T245RHLR and PI4ULS3V502AQ, the TC7MPB9307FK(EL) uniquely guarantees sub-5 Ω ON-resistance across full 1.65–5.0 V / 2.3–5.5 V operating ranges and includes 5.5 V-tolerant OE with power-down protection - critical for industrial power-sequencing reliability.
Availability
TC7MPB9307FK(EL) is available at Aetrix Electronics and suitable for industrial PLC I/O modules, FPGA-to-microcontroller interfacing, and automotive infotainment backplanes requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.
Supply support for TC7MPB9307FK(EL) includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs high-reliability semiconductor components for industrial, automotive, and computing applications, with emphasis on power efficiency, signal integrity, and long-lifecycle support.
The TC7MPB9307FK(EL) belongs to Toshiba's TC7MPB series of dual-supply bus switches, engineered specifically for voltage-domain bridging in mixed-supply digital systems where low RON, wide voltage flexibility, and OE robustness are mandatory.
FAQ
What is the maximum allowable voltage difference between VCCA and VCCB for reliable operation of the TC7MPB9307FK(EL)?
The TC7MPB9307FK(EL) requires VCCA to be strictly less than VCCB per its operating specification (Note 1 in Section 10). While absolute maximum ratings allow both supplies up to 7.0 V, functional operation is only guaranteed when VCCA < VCCB - for example, 3.3 V on VCCA and 5.0 V on VCCB. Exceeding this constraint risks reverse conduction and undefined switching behavior in the TC7MPB9307FK(EL).
Does the TC7MPB9307FK(EL) support level translation from 5.0 V down to 1.8 V?
No - the TC7MPB9307FK(EL) does not support VCCA = 5.0 V and VCCB = 1.8 V. Its operating specification mandates VCCA < VCCB, and VCCA minimum is 1.65 V while VCCB minimum is 2.3 V. Down-translation (5.0 V → 1.8 V) would violate both the VCCA < VCCB rule and the VCCB lower limit; the TC7MPB9307FK(EL) is designed exclusively for up-translation or same-level switching within its defined dual-supply window.
Can the OE pin of the TC7MPB9307FK(EL) be driven directly from a 5 V microcontroller GPIO while VCCA is powered at 1.8 V?
Yes - the OE input of the TC7MPB9307FK(EL) is explicitly rated for 5.5 V tolerance and includes power-down protection. This allows direct connection to a 5 V logic output even when VCCA is at 1.8 V, eliminating the need for external level-shifting circuitry on the enable line and simplifying power sequencing in multi-rail systems using the TC7MPB9307FK(EL).
What is the typical ON-capacitance per channel of the TC7MPB9307FK(EL), and how does it affect high-speed signal integrity?
The TC7MPB9307FK(EL) exhibits 14 pF typical ON-capacitance per switch channel (Section 12.4). Combined with its 5.0 Ω typical RON, this yields a 70 ps RC time constant - preserving signal rise/fall times below 100 ps for edges up to ~3.5 GHz. This ensures minimal distortion on DDR, PCIe, or high-speed sensor data lines routed through the TC7MPB9307FK(EL).
Is the TC7MPB9307FK(EL) pin-compatible with earlier Toshiba bus switches like the TC7WBP08FU?
No - the TC7MPB9307FK(EL) is not pin-compatible with TC7WBP08FU. The TC7MPB9307FK(EL) uses a 20-pin VSSOP (US20) package with dedicated VCCA, VCCB, and GND pins distributed across the perimeter, whereas TC7WBP08FU uses an 8-pin US8 package with shared VCC and GND. Pin mapping, channel count (8 vs. 2), and supply architecture differ fundamentally between the two devices.
TC7MPB9307FK(EL) Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- TC7MP
- Package/Case:
- 20-VFSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Bus Switch
- Circuit:
- 8 x 1:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Dual Supply
- Voltage - Supply:
- 1.65V ~ 5V, 2.3V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-VSSOP
TC7MPB9307FK(EL) FAQ
1.How can I place an order for TC7MPB9307FK(EL) through Aetrix?
Please submit a Request for Quotation (RFQ) for TC7MPB9307FK(EL) on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TC7MPB9307FK(EL) reliable?
The price and inventory of TC7MPB9307FK(EL) are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TC7MPB9307FK(EL) is usually 5 days.
3.What payment methods are accepted for TC7MPB9307FK(EL)?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TC7MPB9307FK(EL) transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TC7MPB9307FK(EL)?
TC7MPB9307FK(EL) orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TC7MPB9307FK(EL) order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TC7MPB9307FK(EL)?
For technical support, including TC7MPB9307FK(EL) datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TC7MPB9307FK(EL) requirements.
6.How does Aetrix verify that TC7MPB9307FK(EL) is sourced from the original manufacturer or authorized distributors?
All TC7MPB9307FK(EL) products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TC7MPB9307FK(EL) meets industry standards.
7.What is the process for return or replacement of TC7MPB9307FK(EL)?
All TC7MPB9307FK(EL) units undergo pre-shipment inspection (PSI). If there is an issue with TC7MPB9307FK(EL), returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TC7MPB9307FK(EL) part is unused and in its original packaging.
Return procedure for TC7MPB9307FK(EL):
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
TC7MPB9307FK(EL) Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

